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Message-ID: <AM0PR04MB66769C7080A32C95AD438ADF8F3A0@AM0PR04MB6676.eurprd04.prod.outlook.com>
Date:   Mon, 21 Sep 2020 22:42:49 +0000
From:   Leo Li <leoyang.li@....com>
To:     Ran Wang <ran.wang_1@....com>, Rob Herring <robh+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>
CC:     "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Biwen Li <biwen.li@....com>, Ran Wang <ran.wang_1@....com>
Subject: RE: [PATCH 2/5] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A



> -----Original Message-----
> From: Ran Wang <ran.wang_1@....com>
> Sent: Wednesday, September 16, 2020 3:18 AM
> To: Leo Li <leoyang.li@....com>; Rob Herring <robh+dt@...nel.org>;
> Shawn Guo <shawnguo@...nel.org>
> Cc: linuxppc-dev@...ts.ozlabs.org; linux-arm-kernel@...ts.infradead.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; Biwen Li
> <biwen.li@....com>; Ran Wang <ran.wang_1@....com>
> Subject: [PATCH 2/5] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
> 
> From: Biwen Li <biwen.li@....com>
> 
> Description:
> 	- Reading configuration register RCPM_IPPDEXPCR1
> 	  always return zero
> 
> Workaround:
> 	- Save register RCPM_IPPDEXPCR1's value to
> 	  register SCFG_SPARECR8.(uboot's psci also
> 	  need reading value from the register SCFG_SPARECR8
> 	  to set register RCPM_IPPDEXPCR1)
> 
> Impact:
> 	- FlexTimer module will cannot wakeup system in
Will not..
Also it will be better to merge this with the issue description part above to prevent confusion.

> 	  deep sleep on SoC LS1021A
> 
> Signed-off-by: Biwen Li <biwen.li@....com>
> Signed-off-by: Ran Wang <ran.wang_1@....com>
> ---
>  drivers/soc/fsl/rcpm.c | 42
> +++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 41 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
> index a093dbe..e6354f5 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -2,7 +2,7 @@
>  //
>  // rcpm.c - Freescale QorIQ RCPM driver
>  //
> -// Copyright 2019 NXP
> +// Copyright 2019-2020 NXP
>  //
>  // Author: Ran Wang <ran.wang_1@....com>
> 
> @@ -13,6 +13,9 @@
>  #include <linux/slab.h>
>  #include <linux/suspend.h>
>  #include <linux/kernel.h>
> +#include <linux/acpi.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
> 
>  #define RCPM_WAKEUP_CELL_MAX_SIZE	7
> 
> @@ -37,6 +40,9 @@ static int rcpm_pm_prepare(struct device *dev)
>  	struct device_node	*np = dev->of_node;
>  	u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
>  	u32 setting[RCPM_WAKEUP_CELL_MAX_SIZE] = {0};
> +	struct regmap *scfg_addr_regmap = NULL;
> +	u32 reg_offset[2];
> +	u32 reg_value = 0;
> 
>  	rcpm = dev_get_drvdata(dev);
>  	if (!rcpm)
> @@ -90,6 +96,40 @@ static int rcpm_pm_prepare(struct device *dev)
>  			tmp |= ioread32be(address);
>  			iowrite32be(tmp, address);
>  		}
> +		/*
> +		 * Workaround of errata A-008646 on SoC LS1021A:
> +		 * There is a bug of register ippdexpcr1.
> +		 * Reading configuration register RCPM_IPPDEXPCR1
> +		 * always return zero. So save ippdexpcr1's value
> +		 * to register SCFG_SPARECR8.And the value of
> +		 * ippdexpcr1 will be read from SCFG_SPARECR8.
> +		 */
> +		if (device_property_present(dev, "fsl,ippdexpcr1-alt-addr"))
> {
> +			if (dev_of_node(dev)) {
> +				scfg_addr_regmap =
> syscon_regmap_lookup_by_phandle(np,
> +
> 	   "fsl,ippdexpcr1-alt-addr");
> +			} else if (is_acpi_node(dev->fwnode)) {
> +				continue;
> +			}
> +
> +			if (scfg_addr_regmap && (i == 1)) {
> +				if (device_property_read_u32_array(dev,
> +				    "fsl,ippdexpcr1-alt-addr",
> +				    reg_offset,
> +				    2)) {

It is not necessary to read out the whole fsl,ippdexpcr1-alt-addr property if we only need the offset.  Also you can change to use the syscon_regmap_lookup_by_phandle_args() API above to simplify the code.

> +					scfg_addr_regmap = NULL;
> +					continue;
> +				}
> +				/* Read value from register SCFG_SPARECR8
> */
> +				regmap_read(scfg_addr_regmap,
> +					    reg_offset[1],
> +					    &reg_value);
> +				/* Write value to register SCFG_SPARECR8 */
> +				regmap_write(scfg_addr_regmap,
> +					     reg_offset[1],
> +					     tmp | reg_value);
> +			}
> +		}
>  	}
> 
>  	return 0;
> --
> 2.7.4

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