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Message-ID: <20200921131646.GC25428@dragon>
Date:   Mon, 21 Sep 2020 21:16:47 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Zhiqiang Hou <Zhiqiang.Hou@....com>
Cc:     linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, bhelgaas@...gle.com,
        robh+dt@...nel.org, leoyang.li@....com, lorenzo.pieralisi@....com,
        gustavo.pimentel@...opsys.com, minghuan.Lian@....com,
        mingkai.hu@....com, roy.zang@....com
Subject: Re: [PATCH 6/7] dts: arm64: ls1043a: Add SCFG phandle for PCIe nodes

On Mon, Sep 07, 2020 at 01:38:00PM +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> 
> The LS1043A PCIe controller has some control registers
> in SCFG block, so add the SCFG phandle for each PCIe
> controller DT node.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>

'arm64: dts: ...' for subject prefix.

Shawn

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