lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200921135821.GH5901@zn.tnic>
Date:   Mon, 21 Sep 2020 15:58:21 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Yazen Ghannam <Yazen.Ghannam@....com>
Cc:     linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
        tony.luck@...el.com, x86@...nel.org,
        Smita.KoralahalliChannabasappa@....com
Subject: Re: [PATCH v2 5/8] x86/MCE/AMD: Use macros to get bitfields in
 translation code

On Thu, Sep 03, 2020 at 08:01:41PM +0000, Yazen Ghannam wrote:
> From: Yazen Ghannam <yazen.ghannam@....com>
> 
> Define macros to get individual bits and bitfields. Use these to make
> the code more readable.
> 
> Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
> ---
> Link:
> https://lkml.kernel.org/r/20200814191449.183998-3-Yazen.Ghannam@amd.com
> 
> v1 -> v2:
> * New patch based on comments for v1 Patch 2.
> 
>  arch/x86/kernel/cpu/mce/amd.c | 46 +++++++++++++++++------------------
>  1 file changed, 23 insertions(+), 23 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
> index 1e0510fd5afc..90c3ad61ae19 100644
> --- a/arch/x86/kernel/cpu/mce/amd.c
> +++ b/arch/x86/kernel/cpu/mce/amd.c
> @@ -675,6 +675,9 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
>  		deferred_error_interrupt_enable(c);
>  }
>  
> +#define get_bits(x, msb, lsb)	((x & GENMASK_ULL(msb, lsb)) >> lsb)
> +#define get_bit(x, bit)		((x >> bit) & BIT(0))
> +
>  #define DF_F0_FABRICINSTINFO3	0x50
>  #define DF_F0_MMIOHOLE		0x104
>  #define DF_F0_DRAMBASEADDR	0x110
> @@ -704,7 +707,7 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
>  
>  	/* Remove HiAddrOffset from normalized address, if enabled: */
>  	if (tmp & BIT(0)) {
> -		u64 hi_addr_offset = (tmp & GENMASK_ULL(31, 20)) << 8;
> +		u64 hi_addr_offset = get_bits(tmp, 31, 20) << 28;
>  
>  		/* Check if base 1 is used. */
>  		if (norm_addr >= hi_addr_offset) {
> @@ -723,10 +726,10 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
>  		goto out_err;
>  	}
>  
> -	lgcy_mmio_hole_en = tmp & BIT(1);
> -	intlv_num_chan	  = (tmp >> 4) & 0xF;
> -	intlv_addr_sel	  = (tmp >> 8) & 0x7;
> -	dram_base_addr	  = (tmp & GENMASK_ULL(31, 12)) << 16;
> +	lgcy_mmio_hole_en = get_bit(tmp, 1);
> +	intlv_num_chan	  = get_bits(tmp, 7, 4);
> +	intlv_addr_sel	  = get_bits(tmp, 10, 8);
> +	dram_base_addr	  = get_bits(tmp, 31, 12) << 28;

I can't say that those macros make it more readable. Now I have to go
lookup what the arguments are. I guess I can imagine what the msb and
lsb is but meh...

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ