lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 22 Sep 2020 12:02:55 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Jonathan Marek <jonathan@...ek.ca>, linux-arm-msm@...r.kernel.org
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Taniya Das <tdas@...eaurora.org>, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/7] dt-bindings: clock: combine qcom,sdm845-dispcc and qcom,sc7180-dispcc

Quoting Jonathan Marek (2020-09-11 08:34:03)
> These two bindings are almost identical, so combine them into one. This
> will make it easier to add the sm8150 and sm8250 dispcc bindings.

Why not just add the sm8150 and sm8250 to the sc7180 binding?

> 
> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
> ---
>  ...om,sdm845-dispcc.yaml => qcom,dispcc.yaml} | 18 ++--
>  .../bindings/clock/qcom,sc7180-dispcc.yaml    | 86 -------------------
>  2 files changed, 12 insertions(+), 92 deletions(-)
>  rename Documentation/devicetree/bindings/clock/{qcom,sdm845-dispcc.yaml => qcom,dispcc.yaml} (86%)
>  delete mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc.yaml
> similarity index 86%
> rename from Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml
> rename to Documentation/devicetree/bindings/clock/qcom,dispcc.yaml
> index ead44705333b..7d5b25dfe0b1 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc.yaml
> @@ -1,32 +1,37 @@
>  # SPDX-License-Identifier: GPL-2.0-only
>  %YAML 1.2
>  ---
> -$id: http://devicetree.org/schemas/clock/qcom,sdm845-dispcc.yaml#
> +$id: http://devicetree.org/schemas/clock/qcom,dispcc.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>  
> -title: Qualcomm Display Clock & Reset Controller Binding for SDM845
> +title: Qualcomm Display Clock & Reset Controller Binding
>  
>  maintainers:
>    - Taniya Das <tdas@...eaurora.org>
>  
>  description: |
>    Qualcomm display clock control module which supports the clocks, resets and
> -  power domains on SDM845.
> +  power domains on SDM845/SC7180.
>  
> -  See also dt-bindings/clock/qcom,dispcc-sdm845.h.
> +  See also:
> +    dt-bindings/clock/qcom,dispcc-sdm845.h
> +    dt-bindings/clock/qcom,dispcc-sc7180.h

Sort please.

>  
>  properties:
>    compatible:
> -    const: qcom,sdm845-dispcc
> +    enum:
> +      - qcom,sdm845-dispcc
> +      - qcom,sc7180-dispcc

Sort please.

>  
>    # NOTE: sdm845.dtsi existed for quite some time and specified no clocks.
>    # The code had to use hardcoded mechanisms to find the input clocks.
>    # New dts files should have these clocks.
>    clocks:
> +    minItems: 8
>      items:
>        - description: Board XO source
>        - description: GPLL0 source from GCC
> -      - description: GPLL0 div source from GCC
> +      - description: GPLL0 div source from GCC (sdm845 only)

They're not the same. Why are we combining them?

>        - description: Byte clock from DSI PHY0
>        - description: Pixel clock from DSI PHY0
>        - description: Byte clock from DSI PHY1
> @@ -35,6 +40,7 @@ properties:
>        - description: VCO DIV clock from DP PHY
>  
>    clock-names:
> +    minItems: 8
>      items:
>        - const: bi_tcxo
>        - const: gcc_disp_gpll0_clk_src

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ