linux-kernel - Re: [PATCH v3 1/1] PCI/ERR: Fix reset logic in pcie_do

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 25 Sep 2020 12:55:34 -0400
From:   Sinan Kaya <okaya@...nel.org>
To:     "Kuppuswamy, Sathyanarayanan" 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        Bjorn Helgaas <helgaas@...nel.org>
Cc:     bhelgaas@...gle.com, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org, ashok.raj@...el.com,
        Jay Vosburgh <jay.vosburgh@...onical.com>
Subject: Re: [PATCH v3 1/1] PCI/ERR: Fix reset logic in pcie_do_recovery()
 call

On 9/25/2020 1:11 AM, Kuppuswamy, Sathyanarayanan wrote:
> 
> 
> On 9/24/20 1:52 PM, Sinan Kaya wrote:
>> On 9/24/2020 12:06 AM, Kuppuswamy, Sathyanarayanan wrote:

>>
>> So, this is a matter of moving the save/restore logic from the hotplug
>> driver into common code so that DPC slot reset takes advantage of it?
> We are not moving it out of hotplug path. But fixing it in this code path.
> With this fix, we will not depend on hotplug driver to restore the state.

Any possibility of unification?


[snip]
>>
>>> To fix above issues, use PCI_ERS_RESULT_NEED_RESET as error state after
>>> successful reset_link() operation. This will ensure ->slot_reset() be
>>> called after reset_link() operation for fatal errors.
>>
>> You lost me here. Why do we want to do secondary bus reset on top of
>> DPC reset?
> For non-hotplug capable slots, when reset (PCI_ERS_RESULT_NEED_RESET) is
> requested, we want to reset it before calling ->slot_reset() callback.

Why? Isn't DPC slot reset enough?
What will bus reset do that DPC slot reset won't do?

I can understand calling bus reset if DPC is not supported.
I don't understand the requirement to do double reset.