linux-kernel - Re: RGMII timing calibration (on 12nm Amlogic SoCs)

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Message-ID: <20200925224616.fetyq4aiiwpspe7g@skbuf>
Date:   Sat, 26 Sep 2020 01:46:16 +0300
From:   Vladimir Oltean <olteanv@...il.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc:     f.fainelli@...il.com, netdev@...r.kernel.org,
        linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux@...linux.org.uk,
        peppe.cavallaro@...com, alexandre.torgue@...com,
        joabreu@...opsys.com, davem@...emloft.net, kuba@...nel.org
Subject: Re: RGMII timing calibration (on 12nm Amlogic SoCs) - integration
 into dwmac-meson8b

On Sat, Sep 26, 2020 at 12:15:59AM +0200, Martin Blumenstingl wrote:
> I do not need the auto-detection of the phy-mode nor any RX/TX delay
> (these are fixed values)
> however, from that patch-set I would need most of
> phy_rgmii_probe_interface() (and all of the helpers it's using)

So if it's not clock skews and it probably isn't equalization either,
since to my knowledge RGMII MACs won't have because they are parallel
and relatively low-speed interfaces, then we need to know what exactly
it is that you calibrate.

As you know, in a serial interface you are likely to find a BIST
function implemented in the SERDES, this would basically offload to
hardware the task of sending and decoding test patterns such as PRBS-11.
With RGMII, you are less likely to see a BIST in hardware, hence the
manual injection of packets that you need to do from software. Whatever
solution you end up choosing, it would be nice if it created a nicely
structured UAPI that could be extended in the future for other types of
electrical interface selftests.

> also I'm wondering if the "protocol" 0x0808 is recommended over ETH_P_EDSA

It probably doesn't make any difference.