linux-kernel - [PATCH 3/5] clk: qcom: mmcc-sdm660: Add MDP clock source CXC to MDSS GDSC

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Date:   Sat, 26 Sep 2020 15:03:04 +0200
From:   kholk11@...il.com
To:     agross@...nel.org
Cc:     bjorn.andersson@...aro.org, sboyd@...nel.org, kholk11@...il.com,
        marijns95@...il.com, konradybcio@...il.com,
        martin.botka1@...il.com, linux-arm-msm@...r.kernel.org,
        phone-devel@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 3/5] clk: qcom: mmcc-sdm660: Add MDP clock source CXC to MDSS GDSC

From: AngeloGioacchino Del Regno <kholk11@...il.com>

It is required for optimal performance and to avoid MDP stalls to
retain mem/periph on GDSC enablement: to achieve this, let's add
the required CXC to the MDSS GDSC.

Signed-off-by: AngeloGioacchino Del Regno <kholk11@...il.com>
---
 drivers/clk/qcom/mmcc-sdm660.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/qcom/mmcc-sdm660.c b/drivers/clk/qcom/mmcc-sdm660.c
index 234aca7c873b..7b1384cf8506 100644
--- a/drivers/clk/qcom/mmcc-sdm660.c
+++ b/drivers/clk/qcom/mmcc-sdm660.c
@@ -2572,6 +2572,8 @@ static struct gdsc mdss_gdsc = {
 	.pd = {
 		.name = "mdss",
 	},
+	.cxcs = (unsigned int []){ 0x2040 },
+	.cxc_count = 1,
 	.pwrsts = PWRSTS_OFF_ON,
 };
 
-- 
2.28.0