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Message-ID: <CAMdYzYosBUUudsRnf9RQ1HKYq8cS4uXRm-9Mg1=hZy+v_Q_X6g@mail.gmail.com>
Date: Fri, 25 Sep 2020 22:01:05 -0400
From: Peter Geis <pgwipeout@...il.com>
To: Dmitry Osipenko <digetx@...il.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Matt Merhar <mattmerhar@...tonmail.com>,
Stephen Warren <swarren@...dotorg.org>,
Bob Ham <rah@...trans.net>,
Leonardo Bras <leobras.c@...il.com>,
Michael Brougham <jusplainmike@...il.com>,
linux-tegra@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] ARM: tegra: Add device-tree for Ouya
On Thu, Sep 24, 2020 at 8:12 PM Dmitry Osipenko <digetx@...il.com> wrote:
>
> ...
> > +/ {
> > + model = "Ouya Game Console";
> > + compatible = "ouya,ouya", "nvidia,tegra30";
> > +
> > + aliases {
> > + rtc0 = &pmic;
> > + rtc1 = "/rtc@...0e000";
> > + serial0 = &uartd; /* Debug Port */
> > + serial1 = &uartc; /* Bluetooth */
> > + mmc0 = &sdmmc4; /* eMMC */
> > + mmc1 = &sdmmc3; /* WiFi */
>
> Thierry may want to sort these aliases in alphabet order.
Thanks, I'll fix this.
>
> > + };
>
> ...
> > + pmic: pmic@2d {
> > + compatible = "ti,tps65911";
> > + reg = <0x2d>;
> > +
> > + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> > + #interrupt-cells = <2>;
> > + interrupt-controller;
> > +
> > + ti,system-power-controller;
>
> Are the ti,sleep-keep-ck32k and other properties not needed for Ouya
> like they are needed for Nexus 7?
Ouya is wall powered, so ultra low power isn't terribly necessary.
Also with LP1 and LP0 not working, it doesn't make much sense to
implement this yet.
>
> ...
> > + sdmmc3: mmc@...00400 {
> > + status = "okay";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + bus-width = <4>;
> > + non-removable;
>
> Recently I added assigned-clocks here for Nexus7/A500 DTs in order to
> get true 50MHz for the WiFi SDIO.
Thanks, it seems we are running at 48MHz right now, so I'll look into this.
>
> > + mmc-pwrseq = <&wifi_pwrseq>;
> > + vmmc-supply = <&sdmmc_3v3_reg>;
> > + vqmmc-supply = <&vdd_1v8>;
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