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Message-ID: <20200927180616.GG19475@kunai>
Date: Sun, 27 Sep 2020 20:06:16 +0200
From: Wolfram Sang <wsa@...nel.org>
To: Tali Perry <tali.perry1@...il.com>
Cc: andriy.shevchenko@...ux.intel.com, kunyi@...gle.com,
benjaminfair@...gle.com, avifishman70@...il.com, joel@....id.au,
tmaimon77@...il.com, linux-i2c@...r.kernel.org,
openbmc@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] i2c: npcm7xx: Clear LAST bit after a failed
transaction.
On Sun, Sep 20, 2020 at 11:48:09PM +0300, Tali Perry wrote:
> Due to a HW issue, in some scenarios the LAST bit might remain set.
> This will cause an unexpected NACK after reading 16 bytes on the next
> read.
>
> Example: if user tries to read from a missing device, get a NACK,
> then if the next command is a long read ( > 16 bytes),
> the master will stop reading after 16 bytes.
> To solve this, if a command fails, check if LAST bit is still
> set. If it does, reset the module.
>
> Fixes: 56a1485b102e (i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver)
> Signed-off-by: Tali Perry <tali.perry1@...il.com>
Applied to for-current, thanks!
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