[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200928215622.GA12677@willie-the-truck>
Date: Mon, 28 Sep 2020 22:56:23 +0100
From: Will Deacon <will@...nel.org>
To: Sumit Garg <sumit.garg@...aro.org>, alexandru.elisei@....com
Cc: linux-arm-kernel@...ts.infradead.org, catalin.marinas@....com,
mark.rutland@....com, peterz@...radead.org, mingo@...hat.com,
acme@...nel.org, alexander.shishkin@...ux.intel.com,
jolsa@...hat.com, namhyung@...nel.org, tglx@...utronix.de,
alexandru.elisei@....com, swboyd@...omium.org,
julien.thierry.kdev@...il.com, dianders@...omium.org,
daniel.thompson@...aro.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] arm64: Enable perf events based hard lockup detector
On Fri, Sep 04, 2020 at 12:56:37PM +0530, Sumit Garg wrote:
> With the recent feature added to enable perf events to use pseudo NMIs
> as interrupts on platforms which support GICv3 or later, its now been
> possible to enable hard lockup detector (or NMI watchdog) on arm64
> platforms. So enable corresponding support.
>
> One thing to note here is that normally lockup detector is initialized
> just after the early initcalls but PMU on arm64 comes up much later as
> device_initcall(). So we need to re-initialize lockup detection once
> PMU has been initialized.
>
> Signed-off-by: Sumit Garg <sumit.garg@...aro.org>
> ---
>
> Changes in v3:
> - Rebased to latest pmu NMI patch-set [1].
> - Addressed misc. comments from Stephen.
>
> [1] https://lkml.org/lkml/2020/8/19/671
>
> Changes since RFC:
> - Rebased on top of Alex's WIP-pmu-nmi branch.
> - Add comment for safe max. CPU frequency.
> - Misc. cleanup.
>
> arch/arm64/Kconfig | 2 ++
> arch/arm64/kernel/perf_event.c | 41 +++++++++++++++++++++++++++++++++++++++--
> drivers/perf/arm_pmu.c | 9 +++++++++
> include/linux/perf/arm_pmu.h | 2 ++
> 4 files changed, 52 insertions(+), 2 deletions(-)
It would be great to have Alexandru's ack on this, since it builds directly
on top of his code.
Will
Powered by blists - more mailing lists