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Message-ID: <CAHp75Ve3APYLKzH9KvmTueEcTP-CZJS9MmLC+ZsHRT9brOxsEQ@mail.gmail.com>
Date: Mon, 28 Sep 2020 14:45:56 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Ed W <lists@...dgooses.com>
Cc: Hans de Goede <hdegoede@...hat.com>,
Mark Gross <mgross@...ux.intel.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Florian Eckert <fe@....tdt.de>,
"Enrico Weigelt, metux IT consult" <info@...ux.net>,
Darren Hart <dvhart@...radead.org>,
Andy Shevchenko <andy@...radead.org>,
Platform Driver <platform-driver-x86@...r.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH] gpio: gpio-amd-fch: Fix typo on define of AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
On Mon, Sep 28, 2020 at 1:33 PM Ed W <lists@...dgooses.com> wrote:
>
> Hi
>
> Could I get a final opinion (or signoff) on this patch please?
>
> The significant typo is the reference to "59", when the GPIO is actually 55
>
> According to the PCEngines schematic the names of two similar GPIOs are
> G59/DEVSLP1
> G55/DEVSLP
>
> The original developer named the second GPIO with a trailing 0, which doesn't seem unreasonable,
> hence I just corrected the name to:
> AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
> However another acceptable name could be:
> AMD_FCH_GPIO_REG_GPIO55_DEVSLP
>
> If I could ask for some guidance and if necessary I will resubmit this patch? Enrico, do you have an
> opinion?
>
> However, perhaps it's already acceptable as is?
It's being accepted, and will be sent later to Linus.
>
> Kind regards
>
> Ed W
>
>
> On 21/09/2020 09:40, Ed W wrote:
> > On 21/09/2020 08:55, Andy Shevchenko wrote:
> >> On Sun, Sep 20, 2020 at 11:33 PM Ed Wildgoose <lists@...dgooses.com> wrote:
> >>> Schematics show that the GPIO number is 55 (not 59). Trivial typo.
> >> Does it still DEVSLP0? Perhaps you need to drop that part as well.
> >>
> >> ...
> >
> >
> > In the PCEngines schematic it's labelled as "G55/DEVSLP" (no 0)
> >
> > (In contrast G59 is labelled "G59/DEVSLP1")
> >
> > What is the quorum opinion on name?
> >
> > Thanks
> >
> > Ed W
> >
> >
> >>
> >>> #define APU2_GPIO_REG_LED3 AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
> >>> #define APU2_GPIO_REG_MODESW AMD_FCH_GPIO_REG_GPIO32_GE1
> >>> #define APU2_GPIO_REG_SIMSWAP AMD_FCH_GPIO_REG_GPIO33_GE2
> >>> -#define APU2_GPIO_REG_MPCIE2 AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
> >>> +#define APU2_GPIO_REG_MPCIE2 AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
> >>> #define APU2_GPIO_REG_MPCIE3 AMD_FCH_GPIO_REG_GPIO51
> >>>
> >>> /* Order in which the GPIO lines are defined in the register list */
> >>> diff --git a/include/linux/platform_data/gpio/gpio-amd-fch.h
> >>> b/include/linux/platform_data/gpio/gpio-amd-fch.h
> >>> index 9e46678ed..255d51c9d 100644
> >>> --- a/include/linux/platform_data/gpio/gpio-amd-fch.h
> >>> +++ b/include/linux/platform_data/gpio/gpio-amd-fch.h
> >>> @@ -19,7 +19,7 @@
> >>> #define AMD_FCH_GPIO_REG_GPIO49 0x40
> >>> #define AMD_FCH_GPIO_REG_GPIO50 0x41
> >>> #define AMD_FCH_GPIO_REG_GPIO51 0x42
> >>> -#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP0 0x43
> >>> +#define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0 0x43
> >>> #define AMD_FCH_GPIO_REG_GPIO57 0x44
> >>> #define AMD_FCH_GPIO_REG_GPIO58 0x45
> >>> #define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1 0x46
> >>
> >
>
--
With Best Regards,
Andy Shevchenko
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