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Message-Id: <20200929131807.15378-3-tmaimon77@gmail.com>
Date: Tue, 29 Sep 2020 16:18:04 +0300
From: Tomer Maimon <tmaimon77@...il.com>
To: robh+dt@...nel.org, mark.rutland@....com, avifishman70@...il.com,
tali.perry1@...il.com, venture@...gle.com, yuenn@...gle.com,
benjaminfair@...gle.com, joel@....id.au
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
openbmc@...ts.ozlabs.org, tmaimon77@...il.com
Subject: [PATCH v8 2/5] arm: dts: modify NPCM7xx device tree timer register size
Modify NPCM7xx device tree timer register size
from 0x50 to 0x1C to control only the timer registers
and not other hw modules.
Signed-off-by: Tomer Maimon <tmaimon77@...il.com>
Reviewed-by: Joel Stanley <joel@....id.au>
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index 16a28c5c4131..72e364054e72 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -120,7 +120,7 @@
timer0: timer@...0 {
compatible = "nuvoton,npcm750-timer";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x8000 0x50>;
+ reg = <0x8000 0x1C>;
clocks = <&clk NPCM7XX_CLK_TIMER>;
};
--
2.22.0
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