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Message-ID: <d4a6eea3c5e33a3a4056885419df95a7@kernel.org>
Date: Tue, 29 Sep 2020 18:25:37 +0100
From: Marc Zyngier <maz@...nel.org>
To: Jon Hunter <jonathanh@...dia.com>
Cc: Jisheng Zhang <Jisheng.Zhang@...aptics.com>,
Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>,
Neil Armstrong <narmstrong@...libre.com>,
linux-pci@...r.kernel.org,
Binghui Wang <wangbinghui@...ilicon.com>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
Thierry Reding <thierry.reding@...il.com>,
linux-arm-kernel@...s.com, Vidya Sagar <vidyas@...dia.com>,
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Jerome Brunet <jbrunet@...libre.com>,
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Subject: Re: [PATCH v2 0/5] PCI: dwc: improve msi handling
On 2020-09-29 14:22, Jon Hunter wrote:
> Hi Jisheng,
>
> On 29/09/2020 11:48, Jisheng Zhang wrote:
>> Hi Jon,
>>
>> On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote:
>>
>>>
>>> On 24/09/2020 12:05, Jisheng Zhang wrote:
>>>> Improve the msi code:
>>>> 1. Add proper error handling.
>>>> 2. Move dw_pcie_msi_init() from each users to designware host to
>>>> solve
>>>> msi page leakage in resume path.
>>>
>>> Apologies if this is slightly off topic, but I have been meaning to
>>> ask
>>> about MSIs and PCI. On Tegra194 which uses the DWC PCI driver,
>>> whenever we
>>> hotplug CPUs we see the following warnings ...
>>>
>>> [ 79.068351] WARNING KERN IRQ70: set affinity failed(-22).
>>> [ 79.068362] WARNING KERN IRQ71: set affinity failed(-22).
>>>
>>
>> I tried to reproduce this issue on Synaptics SoC, but can't reproduce
>> it.
>> Per my understanding of the code in kernel/irq/cpuhotplug.c, this
>> warning
>> happened when we migrate irqs away from the offline cpu, this
>> implicitly
>> implies that before this point the irq has bind to the offline cpu,
>> but how
>> could this happen given current dw_pci_msi_set_affinity()
>> implementation
>> always return -EINVAL
>
> By default the smp_affinity should be set so that all CPUs can be
> interrupted ...
>
> $ cat /proc/irq/70/smp_affinity
> 0xff
>
> In my case there are 8 CPUs and so 0xff implies that the interrupt can
> be triggered on any of the 8 CPUs.
>
> Do you see the set_affinity callback being called for the DWC irqchip
> in
> migrate_one_irq()?
The problem is common to all MSI implementations that end up muxing
all the end-point MSIs into a single interrupt. With these systems,
you cannot set the affinity of individual MSIs (they don't target a
CPU, they target another interrupt... braindead). Only the mux
interrupt can have its affinity changed.
So returning -EINVAL is the right thing to do.
M.
--
Jazz is not dead. It just smells funny...
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