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Message-ID: <20200930154149.GL4974@sirena.org.uk>
Date:   Wed, 30 Sep 2020 16:41:49 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc:     Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>,
        Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Lars Povlsen <lars.povlsen@...rochip.com>,
        "wuxu . wu" <wuxu.wu@...wei.com>, Feng Tang <feng.tang@...el.com>,
        Rob Herring <robh+dt@...nel.org>, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 11/30] spi: dw: Add DWC SSI capability

On Wed, Sep 30, 2020 at 06:03:12PM +0300, Serge Semin wrote:
> On Wed, Sep 30, 2020 at 01:17:37AM +0300, Serge Semin wrote:

> > > > -	/*
> > > > -	 * SPI mode (SCPOL|SCPH)
> > > > -	 * CTRLR0[ 8] Serial Clock Phase
> > > > -	 * CTRLR0[ 9] Serial Clock Polarity
> > > > -	 */
> > > > -	cr0 |= ((spi->mode & SPI_CPOL) ? 1 : 0) << DWC_SSI_CTRLR0_SCPOL_OFFSET;

> anyway. If you are agree with me having that done here, then please, accept the
> patch the way it is. If you disagree, or have any other though, please give me
> your answer, why.

Those comments did seem to help mitigate the wall of acronym soup issue
that the code has, it seems a shame to drop them.

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