linux-kernel - Re: [PATCH v3 01/18] irqchip: Add IMS (Interrupt Message Storage) driver

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Message-ID: <87362zi0nr.fsf@nanos.tec.linutronix.de>
Date:   Wed, 30 Sep 2020 20:23:36 +0200
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Dave Jiang <dave.jiang@...el.com>, vkoul@...nel.org,
        megha.dey@...el.com, maz@...nel.org, bhelgaas@...gle.com,
        alex.williamson@...hat.com, jacob.jun.pan@...el.com,
        ashok.raj@...el.com, jgg@...lanox.com, yi.l.liu@...el.com,
        baolu.lu@...el.com, kevin.tian@...el.com, sanjay.k.kumar@...el.com,
        tony.luck@...el.com, jing.lin@...el.com, dan.j.williams@...el.com,
        kwankhede@...dia.com, eric.auger@...hat.com, parav@...lanox.com,
        jgg@...lanox.com, rafael@...nel.org, netanelg@...lanox.com,
        shahafs@...lanox.com, yan.y.zhao@...ux.intel.com,
        pbonzini@...hat.com, samuel.ortiz@...el.com, mona.hossain@...el.com
Cc:     dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org,
        x86@...nel.org, linux-pci@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH v3 01/18] irqchip: Add IMS (Interrupt Message Storage) driver

On Tue, Sep 15 2020 at 16:27, Dave Jiang wrote:
> From: Thomas Gleixner <tglx@...utronix.de>
> +config IMS_MSI_ARRAY
> +	bool "IMS Interrupt Message Storm MSI controller for device memory storage arrays"

Hehe, you missed a Message Storm :)

> +	depends on PCI
> +	select IMS_MSI
> +	select GENERIC_MSI_IRQ_DOMAIN
> +	help
> +	  Support for IMS Interrupt Message Storm MSI controller

and another one.

> +	  with IMS slot storage in a slot array in device memory
> +
> +static void ims_array_mask_irq(struct irq_data *data)
> +{
> +	struct msi_desc *desc = irq_data_get_msi_desc(data);
> +	struct ims_slot __iomem *slot = desc->device_msi.priv_iomem;
> +	u32 __iomem *ctrl = &slot->ctrl;
> +
> +	iowrite32(ioread32(ctrl) | IMS_VECTOR_CTRL_MASK, ctrl);
> +	ioread32(ctrl); /* Flush write to device */

Bah, I fundamentaly hate tail comments. They are a distraction and
disturb the reading flow. Put it above the ioread32() please.

> +static void ims_array_unmask_irq(struct irq_data *data)
> +{
> +	struct msi_desc *desc = irq_data_get_msi_desc(data);
> +	struct ims_slot __iomem *slot = desc->device_msi.priv_iomem;
> +	u32 __iomem *ctrl = &slot->ctrl;
> +
> +	iowrite32(ioread32(ctrl) & ~IMS_VECTOR_CTRL_MASK, ctrl);

Why is this one not flushed?

> +}
> +
> +static void ims_array_write_msi_msg(struct irq_data *data, struct msi_msg *msg)
> +{
> +	struct msi_desc *desc = irq_data_get_msi_desc(data);
> +	struct ims_slot __iomem *slot = desc->device_msi.priv_iomem;
> +
> +	iowrite32(msg->address_lo, &slot->address_lo);
> +	iowrite32(msg->address_hi, &slot->address_hi);
> +	iowrite32(msg->data, &slot->data);
> +	ioread32(slot);

Yuck? slot points to the struct and just because ioread32() accepts a
void pointer does not make it any more readable.

> +static void ims_array_reset_slot(struct ims_slot __iomem *slot)
> +{
> +	iowrite32(0, &slot->address_lo);
> +	iowrite32(0, &slot->address_hi);
> +	iowrite32(0, &slot->data);
> +	iowrite32(0, &slot->ctrl);

Flush?

Thanks,

        tglx