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Date: Wed, 30 Sep 2020 23:57:22 +0200 From: Thomas Gleixner <tglx@...utronix.de> To: "Raj\, Ashok" <ashok.raj@...el.com>, Jason Gunthorpe <jgg@...dia.com> Cc: Dave Jiang <dave.jiang@...el.com>, vkoul@...nel.org, megha.dey@...el.com, maz@...nel.org, bhelgaas@...gle.com, alex.williamson@...hat.com, jacob.jun.pan@...el.com, yi.l.liu@...el.com, baolu.lu@...el.com, kevin.tian@...el.com, sanjay.k.kumar@...el.com, tony.luck@...el.com, jing.lin@...el.com, dan.j.williams@...el.com, kwankhede@...dia.com, eric.auger@...hat.com, parav@...lanox.com, rafael@...nel.org, netanelg@...lanox.com, shahafs@...lanox.com, yan.y.zhao@...ux.intel.com, pbonzini@...hat.com, samuel.ortiz@...el.com, mona.hossain@...el.com, dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org, x86@...nel.org, linux-pci@...r.kernel.org, kvm@...r.kernel.org, Ashok Raj <ashok.raj@...el.com> Subject: Re: [PATCH v3 05/18] dmaengine: idxd: add IMS support in base driver On Wed, Sep 30 2020 at 14:49, Ashok Raj wrote: >> It is the weirdest thing, IMHO. Intel defined a dvsec cap in their >> SIOV cookbook, but as far as I can see it serves no purpose at >> all. >> >> Last time I asked I got some unclear mumbling about "OEMs". >> > One of the parameters it has is the "supported system page-sizes" which is > usually there in the SRIOV properties. So it needed a place holder for > that. > > IMS is a device specific capability, and I almost forgot why we needed > until I had to checking internally. Remember when a device is given to a > guest, MSIX routing via Interrupt Remapping is automatic via the VFIO/IRQFD > and such. -ENOPARSE > When we provision an entire PCI device that is IMS capable. The guest > driver does know it can update the IMS entries directly without going to > the host. But in order to do remapping we need something like how we manage > PASID allocation from guest, so an IRTE entry can be allocated and the host > driver can write the proper values for IMS. And how is that related to that capbility thing? Also this stuff is host side and not guest side. I seriously doubt that you want to hand in the whole PCI device which contains the IMS thing. The whole point of IMS was as far as I was told that you can create gazillions of subdevices and have seperate MSI interrupts for each of them. Thanks, tglx
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