lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200930105408.GE6810@zn.tnic>
Date:   Wed, 30 Sep 2020 12:54:08 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     shuo.a.liu@...el.com
Cc:     linux-kernel@...r.kernel.org, x86@...nel.org,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "H . Peter Anvin" <hpa@...or.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        Sean Christopherson <sean.j.christopherson@...el.com>,
        Yu Wang <yu1.wang@...el.com>,
        Reinette Chatre <reinette.chatre@...el.com>,
        Yakui Zhao <yakui.zhao@...el.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Dan Williams <dan.j.williams@...el.com>,
        Fengwei Yin <fengwei.yin@...el.com>,
        Zhi Wang <zhi.a.wang@...el.com>,
        Zhenyu Wang <zhenyuw@...ux.intel.com>
Subject: Re: [PATCH v4 04/17] x86/acrn: Introduce hypercall interfaces

On Tue, Sep 22, 2020 at 07:42:58PM +0800, shuo.a.liu@...el.com wrote:
> From: Shuo Liu <shuo.a.liu@...el.com>
> 
> The Service VM communicates with the hypervisor via conventional
> hypercalls. VMCALL instruction is used to make the hypercalls.
> 
> ACRN hypercall ABI:
>   * Hypercall number is in R8 register.
>   * Up to 2 parameters are in RDI and RSI registers.
>   * Return value is in RAX register.

I'm assuming this is already cast in stone in the HV and it cannot be
changed?

> Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8
> register as direct register constraints, here are two ways to use R8 in
> extended asm:
>   1) use explicit register variable as input
>   2) use supported constraint as input with a explicit MOV to R8 in
>      beginning of asm
> 
> The number of instructions of above two ways are same.
> Asm code from 1)
>   38:   41 b8 00 00 00 80       mov    $0x80000000,%r8d
>   3e:   48 89 c7                mov    %rax,%rdi
>   41:   0f 01 c1                vmcall
> Here, writes to the lower dword (%r8d) clear the upper dword of %r8 when
> the CPU is in 64-bit mode.
> 
> Asm code from 2)
>   38:   48 89 c7                mov    %rax,%rdi
>   3b:   49 b8 00 00 00 80 00    movabs $0x80000000,%r8
>   42:   00 00 00
>   45:   0f 01 c1                vmcall
> 
> Choose 1) for code simplicity and a little bit of code size
> optimization.

What?

How much "optimization" is this actually? A couple of bytes?

And all that for this

	/* Nothing can come between the r8 assignment and the asm: */

restriction?

If it is only a couple of bytes, just do the explicit MOV to %r8 and
f'get about it.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ