| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <3379a8af-67ae-f71f-316d-3baa5fadc6dd@arm.com>
Date: Wed, 30 Sep 2020 12:46:52 +0100
From: Alexandru Elisei <alexandru.elisei@....com>
To: Marc Zyngier <maz@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
mark.rutland@....com, sumit.garg@...aro.org, swboyd@...omium.org,
catalin.marinas@....com, will@...nel.org,
Julien Thierry <julien.thierry@....com>,
Julien Thierry <julien.thierry.kdev@...il.com>,
Marc Zyngier <marc.zyngier@....com>,
Will Deacon <will.deacon@....com>,
James Morse <james.morse@....com>,
Suzuki K Pouloze <suzuki.poulose@....com>,
kvm@...r.kernel.org, kvmarm@...ts.cs.columbia.edu
Subject: Re: [PATCH v7 5/7] KVM: arm64: pmu: Make overflow handler NMI safe
Hello,
On 9/29/20 9:11 AM, Marc Zyngier wrote:
> On 2020-09-24 12:07, Alexandru Elisei wrote:
>> From: Julien Thierry <julien.thierry@....com>
>>
>> kvm_vcpu_kick() is not NMI safe. When the overflow handler is called from
>> NMI context, defer waking the vcpu to an irq_work queue.
>>
>> A vcpu can be freed while it's not running by kvm_destroy_vm(). Prevent
>> running the irq_work for a non-existent vcpu by calling irq_work_sync() on
>> the PMU destroy path.
>>
>> Cc: Julien Thierry <julien.thierry.kdev@...il.com>
>> Cc: Marc Zyngier <marc.zyngier@....com>
>> Cc: Will Deacon <will.deacon@....com>
>> Cc: Mark Rutland <mark.rutland@....com>
>> Cc: Catalin Marinas <catalin.marinas@....com>
>> Cc: James Morse <james.morse@....com>
>> Cc: Suzuki K Pouloze <suzuki.poulose@....com>
>> Cc: kvm@...r.kernel.org
>> Cc: kvmarm@...ts.cs.columbia.edu
>> Signed-off-by: Julien Thierry <julien.thierry@....com>
>> Tested-by: Sumit Garg <sumit.garg@...aro.org> (Developerbox)
>> [Alexandru E.: Added irq_work_sync()]
>> Signed-off-by: Alexandru Elisei <alexandru.elisei@....com>
>> ---
>> I suggested in v6 that I will add an irq_work_sync() to
>> kvm_pmu_vcpu_reset(). It turns out it's not necessary: a vcpu reset is done
>> by the vcpu being reset with interrupts enabled, which means all the work
>> has had a chance to run before the reset takes place.
>
> I don't understand your argument about interrupts being enabled. The real
> reason for not needing any synchronization is that all that the queued work
> does is to kick the vcpu. Given that the vcpu is resetting, no amount of
> kicking is going to change anything (it is already outside of the guest).
>
> Things are obviously different on destroy, where the vcpu is actively going
> away and we need to make sure we don't use stale data.
Like you and Will noticed, the above really doesn't make much sense. The reason we
don't need to wait for the irq_work to be finished on reset is indeed that the
vcpu isn't freed, so we will never trigger a use-after-free bug.
>
>>
>> arch/arm64/kvm/pmu-emul.c | 26 +++++++++++++++++++++++++-
>> include/kvm/arm_pmu.h | 1 +
>> 2 files changed, 26 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
>> index f0d0312c0a55..81916e360b1e 100644
>> --- a/arch/arm64/kvm/pmu-emul.c
>> +++ b/arch/arm64/kvm/pmu-emul.c
>> @@ -269,6 +269,7 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu)
>>
>> for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++)
>> kvm_pmu_release_perf_event(&pmu->pmc[i]);
>> + irq_work_sync(&vcpu->arch.pmu.overflow_work);
>> }
>>
>> u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
>> @@ -433,6 +434,22 @@ void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu)
>> kvm_pmu_update_state(vcpu);
>> }
>>
>> +/**
>> + * When perf interrupt is an NMI, we cannot safely notify the vcpu
>> corresponding
>> + * to the event.
>> + * This is why we need a callback to do it once outside of the NMI context.
>> + */
>> +static void kvm_pmu_perf_overflow_notify_vcpu(struct irq_work *work)
>> +{
>> + struct kvm_vcpu *vcpu;
>> + struct kvm_pmu *pmu;
>> +
>> + pmu = container_of(work, struct kvm_pmu, overflow_work);
>> + vcpu = kvm_pmc_to_vcpu(pmu->pmc);
>> +
>> + kvm_vcpu_kick(vcpu);
>> +}
>> +
>> /**
>> * When the perf event overflows, set the overflow status and inform the vcpu.
>> */
>> @@ -465,7 +482,11 @@ static void kvm_pmu_perf_overflow(struct
>> perf_event *perf_event,
>>
>> if (kvm_pmu_overflow_status(vcpu)) {
>> kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
>> - kvm_vcpu_kick(vcpu);
>> +
>> + if (!in_nmi())
>> + kvm_vcpu_kick(vcpu);
>> + else
>> + irq_work_queue(&vcpu->arch.pmu.overflow_work);
>> }
>>
>> cpu_pmu->pmu.start(perf_event, PERF_EF_RELOAD);
>> @@ -764,6 +785,9 @@ static int kvm_arm_pmu_v3_init(struct kvm_vcpu *vcpu)
>> return ret;
>> }
>>
>> + init_irq_work(&vcpu->arch.pmu.overflow_work,
>> + kvm_pmu_perf_overflow_notify_vcpu);
>> +
>> vcpu->arch.pmu.created = true;
>> return 0;
>> }
>> diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h
>> index 6db030439e29..dbf4f08d42e5 100644
>> --- a/include/kvm/arm_pmu.h
>> +++ b/include/kvm/arm_pmu.h
>> @@ -27,6 +27,7 @@ struct kvm_pmu {
>> bool ready;
>> bool created;
>> bool irq_level;
>> + struct irq_work overflow_work;
>
> Nit: placing this new field right after the pmc array would avoid creating
> an unnecessary padding in the structure. Not a big deal, and definitely
> something we can sort out when applying the patch.
That makes sense, overflow_work must be aligned to 8 bytes, and there are 16
elements in the pmc array, which means no padding is required for the
overflow_work field.
Thanks,
Alex
Powered by blists - more mailing lists