linux-kernel - Re: [RESEND PATCH 1/2] mtd: spi-nor: do not touch TB bit without SPI_NOR_HAS

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Message-ID: <4a5945534f7b41cb799c044ec8c9d31c61d5beda.camel@yadro.com>
Date:   Wed, 30 Sep 2020 16:07:53 +0300
From:   Ivan Mikhaylov <i.mikhaylov@...ro.com>
To:     Vignesh Raghavendra <vigneshr@...com>,
        Tudor Ambarus <tudor.ambarus@...rochip.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Richard Weinberger <richard@....at>
CC:     <linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RESEND PATCH 1/2] mtd: spi-nor: do not touch TB bit without
 SPI_NOR_HAS_TB

On Wed, 2020-09-30 at 15:06 +0530, Vignesh Raghavendra wrote:
> 
> On 9/21/20 4:54 PM, Ivan Mikhaylov wrote:
> > Some chips like macronix don't have TB(Top/Bottom protection)
> > bit in the status register. Do not write tb_mask inside status
> > register, unless SPI_NOR_HAS_TB is present for the chip.
> > 
> 
> Not entirely accurate.. Macronix chips have TB bit in config register
> and is OTP and hence should not be touched ideally...
> 
> You still need to "read" that bit to determine actual scheme (Top vs
> Bottom). This is needs to be done before 2/2 enables SPI_NOR_HAS_LOCK
> flag for macronix flashes.

Vignesh, that's the point about this commit to generalize this part about TB bit
plus there is already exist SPI_NOR_HAS_TB flag which representing state of TB
existence. I didn't add any support for macronix's TB bit, that's true but
that's enough to make macronix chips able to use lock mechanism with default
'use_top' or any other chips which doesn't have TB bit.

> I guess macronix does not support SR_SRWD right? This needs special
> treatment as well.

It does support SR_SRWD as well. No need any special treatment here.

Thanks.