linux-kernel - Re: [PATCH v2 5/5] media: mt9p031: Fix corrupted frame after restarting stream

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Message-ID: <20201002000549.GK3722@pendragon.ideasonboard.com>
Date:   Fri, 2 Oct 2020 03:05:49 +0300
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     Stefan Riedmueller <s.riedmueller@...tec.de>
Cc:     Mauro Carvalho Chehab <mchehab@...nel.org>,
        Sakari Ailus <sakari.ailus@...ux.intel.com>,
        linux-media@...r.kernel.org, linux-kernel@...r.kernel.org,
        Dirk Bender <d.bender@...tec.de>
Subject: Re: [PATCH v2 5/5] media: mt9p031: Fix corrupted frame after
 restarting stream

Hi Stefan,

Thank you for the patch.

On Wed, Sep 30, 2020 at 12:51:33PM +0200, Stefan Riedmueller wrote:
> From: Dirk Bender <d.bender@...tec.de>
> 
> To prevent corrupted frames after starting and stopping the sensor it's

s/it's/its/

> datasheet specifies a specific pause sequence to follow:
> 
> Stopping:
> 	Set Pause_Restart Bit -> Set Restart Bit -> Set Chip_Enable Off
> 
> Restarting:
> 	Set Chip_Enable On -> Clear Pause_Restart Bit
> 
> The Restart Bit is cleared automatically and must not be cleared
> manually as this would cause undefined behavior.
> 
> Signed-off-by: Dirk Bender <d.bender@...tec.de>
> Signed-off-by: Stefan Riedmueller <s.riedmueller@...tec.de>
> ---
> No changes in v2
> ---
>  drivers/media/i2c/mt9p031.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c
> index d10457361e6c..d59f66e3dcf3 100644
> --- a/drivers/media/i2c/mt9p031.c
> +++ b/drivers/media/i2c/mt9p031.c
> @@ -80,6 +80,8 @@
>  #define		MT9P031_PIXEL_CLOCK_SHIFT(n)		((n) << 8)
>  #define		MT9P031_PIXEL_CLOCK_DIVIDE(n)		((n) << 0)
>  #define MT9P031_FRAME_RESTART				0x0b
> +#define		MT9P031_FRAME_RESTART_SET		(1 << 0)
> +#define		MT9P031_FRAME_PAUSE_RESTART_SET		(1 << 1)

The fields are named Restart and Pause_Restart, I would drop _SET. Could
you also sort them from MSB to LSB as for the other registers ? Using
BIT() would be good too, although this could be done as an additional
patch to convert all the existing macros.

>  #define MT9P031_SHUTTER_DELAY				0x0c
>  #define MT9P031_RST					0x0d
>  #define		MT9P031_RST_ENABLE			1
> @@ -483,9 +485,25 @@ static int mt9p031_set_params(struct mt9p031 *mt9p031)
>  static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable)
>  {
>  	struct mt9p031 *mt9p031 = to_mt9p031(subdev);
> +	struct i2c_client *client = v4l2_get_subdevdata(subdev);
> +	int val;
>  	int ret;
>  
>  	if (!enable) {
> +		val = mt9p031_read(client, MT9P031_FRAME_RESTART);

Do you need to read the register ? Can't you write
MT9P031_FRAME_PAUSE_RESTART_SET and then MT9P031_FRAME_PAUSE_RESTART_SET
| MT9P031_FRAME_RESTART_SET ? And actually, can't we just write both
bits in one go, do we need two writes ?

> +
> +		/* enable pause restart */
> +		val |= MT9P031_FRAME_PAUSE_RESTART_SET;
> +		ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val);
> +		if (ret < 0)
> +			return ret;
> +
> +		/* enable restart + keep pause restart set */
> +		val |= MT9P031_FRAME_RESTART_SET;
> +		ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val);
> +		if (ret < 0)
> +			return ret;
> +
>  		/* Stop sensor readout */
>  		ret = mt9p031_set_output_control(mt9p031,
>  						 MT9P031_OUTPUT_CONTROL_CEN, 0);
> @@ -505,6 +523,13 @@ static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable)
>  	if (ret < 0)
>  		return ret;
>  
> +	val = mt9p031_read(client, MT9P031_FRAME_RESTART);
> +	/* disable reset + pause restart */
> +	val &= ~MT9P031_FRAME_PAUSE_RESTART_SET;

Same here, I think you can simply write MT9P031_FRAME_PAUSE_RESTART_SET.

> +	ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val);
> +	if (ret < 0)
> +		return ret;
> +
>  	return mt9p031_pll_enable(mt9p031);
>  }
>  

-- 
Regards,

Laurent Pinchart