lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [day] [month] [year] [list]
Message-ID: <20201002134210.15a612d7@canb.auug.org.au>
Date:   Fri, 2 Oct 2020 13:42:10 +1000
From:   Stephen Rothwell <sfr@...b.auug.org.au>
To:     Dave Airlie <airlied@...ux.ie>,
        DRI <dri-devel@...ts.freedesktop.org>
Cc:     Alex Deucher <alexander.deucher@....com>,
        Evan Quan <evan.quan@....com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux Next Mailing List <linux-next@...r.kernel.org>
Subject: linux-next: manual merge of the drm tree with Linus' tree

Hi all,

Today's linux-next merge of the drm tree got a conflict in:

  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

between commit:

  b19515253623 ("drm/amd/pm: setup APU dpm clock table in SMU HW initialization")

from the Linus tree and commits:

  82cac71c1b64 ("drm/amd/pm: put Navi1X umc cdr workaround in post_smu_init")
  236b156f7388 ("drm/amd/pm: apply no power source workaround if dc reported by gpio")
  1653a179c822 ("drm/amd/pm: move NAVI1X power mode switching workaround to post_init")

from the drm tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 8dc5abb6931e,5c4b74f964fc..000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@@ -955,35 -1013,6 +1002,17 @@@ static int smu_smc_hw_setup(struct smu_
  		return ret;
  	}
  
- 	ret = smu_disable_umc_cdr_12gbps_workaround(smu);
- 	if (ret) {
- 		dev_err(adev->dev, "Workaround failed to disable UMC CDR feature on 12Gbps SKU!\n");
- 		return ret;
- 	}
- 
- 	/*
- 	 * For Navi1X, manually switch it to AC mode as PMFW
- 	 * may boot it with DC mode.
- 	 */
- 	ret = smu_set_power_source(smu,
- 				   adev->pm.ac_power ? SMU_POWER_SOURCE_AC :
- 				   SMU_POWER_SOURCE_DC);
- 	if (ret) {
- 		dev_err(adev->dev, "Failed to switch to %s mode!\n", adev->pm.ac_power ? "AC" : "DC");
- 		return ret;
- 	}
- 
 +	/*
 +	 * Set initialized values (get from vbios) to dpm tables context such as
 +	 * gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
 +	 * type of clks.
 +	 */
 +	ret = smu_set_default_dpm_table(smu);
 +	if (ret) {
 +		dev_err(adev->dev, "Failed to setup default dpm clock tables!\n");
 +		return ret;
 +	}
 +
  	ret = smu_notify_display_change(smu);
  	if (ret)
  		return ret;

Content of type "application/pgp-signature" skipped

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ