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Message-ID: <20201004191329.GA27962@wunner.de>
Date: Sun, 4 Oct 2020 21:13:29 +0200
From: Lukas Wunner <lukas@...ner.de>
To: Ethan Zhao <haifeng.zhao@...el.com>
Cc: bhelgaas@...gle.com, oohall@...il.com, ruscur@...sell.cc,
andriy.shevchenko@...ux.intel.com, stuart.w.hayes@...il.com,
mr.nuke.me@...il.com, mika.westerberg@...ux.intel.com,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
ashok.raj@...ux.intel.com, sathyanarayanan.kuppuswamy@...el.com,
xerces.zhao@...il.com
Subject: Re: [PATCH v7 3/5] PCI: pciehp: check and wait port status out of
DPC before handling DLLSC and PDC
On Sat, Oct 03, 2020 at 03:55:12AM -0400, Ethan Zhao wrote:
> When root port has DPC capability and it is enabled, then triggered by
> errors, DPC DLLSC and PDC etc interrupts will be sent to DPC driver, pciehp
> drivers almost at the same time.
Do the DLLSC and PDC events occur as a result of handling the error
or do they occur independently?
If the latter, I don't see how we can tell whether the card in the
slot is still the same.
If the former, holding the hotplug slot's reset_lock and doing something
along the lines of pciehp_reset_slot() (or calling it directly) might
solve the race.
Thanks,
Lukas
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