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Message-Id: <20201004213204.11584-1-bert@biot.com>
Date: Sun, 4 Oct 2020 23:32:04 +0200
From: Bert Vermeulen <bert@...t.com>
To: tudor.ambarus@...rochip.com, miquel.raynal@...tlin.com,
richard@....at, vigneshr@...com, linux-mtd@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: Bert Vermeulen <bert@...t.com>
Subject: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.
Signed-off-by: Bert Vermeulen <bert@...t.com>
---
drivers/mtd/spi-nor/core.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0369d98b2d12..a2c35ad9645c 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
/* already configured from SFDP */
} else if (nor->info->addr_width) {
nor->addr_width = nor->info->addr_width;
- } else if (nor->mtd.size > 0x1000000) {
- /* enable 4-byte addressing if the device exceeds 16MiB */
- nor->addr_width = 4;
} else {
nor->addr_width = 3;
}
+ if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+ /* enable 4-byte addressing if the device exceeds 16MiB */
+ nor->addr_width = 4;
+ }
+
if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
dev_dbg(nor->dev, "address width is too large: %u\n",
nor->addr_width);
--
2.17.1
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