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Date:   Mon, 5 Oct 2020 10:16:28 -0400
From:   Alan Stern <stern@...land.harvard.edu>
To:     Will Deacon <will@...nel.org>
Cc:     "Paul E. McKenney" <paulmck@...nel.org>, parri.andrea@...il.com,
        peterz@...radead.org, boqun.feng@...il.com, npiggin@...il.com,
        dhowells@...hat.com, j.alglave@....ac.uk, luc.maranget@...ia.fr,
        akiyks@...il.com, dlustig@...dia.com, joel@...lfernandes.org,
        viro@...iv.linux.org.uk, linux-kernel@...r.kernel.org,
        linux-arch@...r.kernel.org
Subject: Re: Litmus test for question from Al Viro

On Mon, Oct 05, 2020 at 09:20:03AM +0100, Will Deacon wrote:
> On Sun, Oct 04, 2020 at 10:38:46PM -0400, Alan Stern wrote:
> > Considering the bug in herd7 pointed out by Akira, we should rewrite P1 as:
> > 
> > P1(int *x, int *y)
> > {
> > 	int r2;
> > 
> > 	r = READ_ONCE(*y);
> 
> (r2?)

Oops, yes, thank you.

> > 	WRITE_ONCE(*x, r2);
> > }
> > 
> > Other than that, this is fine.
> 
> But yes, module the typo, I agree that this rewrite is much better than the
> proposal above. The definition of control dependencies on arm64 (per the Arm
> ARM [1]) isn't entirely clear that it provides order if the WRITE is
> executed on both paths of the branch, and I believe there are ongoing
> efforts to try to tighten that up.

Do you mean that people aren't yet in agreement about what the answer 
should be?

How can the CPU tell whether a write is executed on both branches?  
Speculatively execute both and see if they both reach the same write 
instruction?  What if the same instruction is reached on both branches 
but the values written or the addresses written to are different?

>  I'd rather keep _that_ topic separate
> from the "bug in herd" topic to avoid extra confusion.

Indeed.

Alan

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