linux-kernel - RE: [PATCH v3 1/3] i2c: imx: Fix reset of I2SR

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Date:   Tue, 6 Oct 2020 12:52:13 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Uwe Kleine-König' 
        <u.kleine-koenig@...gutronix.de>
CC:     'Christian Eggers' <ceggers@...i.de>,
        Oleksij Rempel <linux@...pel-privat.de>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>,
        NXP Linux Team <linux-imx@....com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>
Subject: RE: [PATCH v3 1/3] i2c: imx: Fix reset of I2SR_IAL flag

From: Uwe Kleine-König
> Sent: 06 October 2020 13:46
...
> > > +static void i2c_imx_clear_irq(struct imx_i2c_struct *i2c_imx, unsigned int bits)
> > > +{
> > > +	unsigned int temp;
> > > +
> > > +	/*
> > > +	 * i2sr_clr_opcode is the value to clear all interrupts.
> > > +	 * Here we want to clear only <bits>, so we write
> > > +	 * ~i2sr_clr_opcode with just <bits> toggled.
> > > +	 */
> > > +	temp = ~i2c_imx->hwdata->i2sr_clr_opcode ^ bits;
> > > +	imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
> > > +}
> >
> > That looks either wrong or maybe just overcomplicated.
> > Why isn't:
> > 	imx_i2c_write_reg(bits, i2c_imx, IMX_I2C_I2SR);
> > enough?
> 
> Your question suggests you either didn't read the comment or the comment
> is not good enough. Maybe once you understood the complication (see
> Christian's mail) you could suggest a better wording? Maybe we have to
> mention that this handles both W1C and W0C.

Yes, the comment should just say that some devices are W1C and
other W0C.
It isn't obvious from that code fragment at all.

Now for the 3rd variant which zeros the bits when they are read :-)

	David

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