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Message-Id: <20201008155154.3.I646736d3969dc47de8daceb379c6ba85993de9f4@changeid>
Date: Thu, 8 Oct 2020 15:52:35 -0700
From: Douglas Anderson <dianders@...omium.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>,
Wolfram Sang <wsa@...nel.org>,
Akash Asthana <akashast@...eaurora.org>
Cc: linux-arm-msm@...r.kernel.org, Stephen Boyd <swboyd@...omium.org>,
linux-i2c@...r.kernel.org,
Douglas Anderson <dianders@...omium.org>,
Andy Gross <agross@...nel.org>, linux-kernel@...r.kernel.org
Subject: [PATCH 3/3] soc: qcom: geni: Optimize select fifo/dma mode
The functions geni_se_select_fifo_mode() and
geni_se_select_fifo_mode() are a little funny. They read/write a
bunch of memory mapped registers even if they don't change or aren't
relevant for the current protocol. Let's make them a little more
sane.
NOTE: there is no evidence at all that this makes any performance
difference and it fixes no bugs. However, it seems (to me) like it
makes the functions a little easier to understand. Decreasing the
amount of times we read/write memory mapped registers is also nice,
even if we are using "relaxed" variants.
Signed-off-by: Douglas Anderson <dianders@...omium.org>
---
drivers/soc/qcom/qcom-geni-se.c | 44 ++++++++++++++++++---------------
1 file changed, 24 insertions(+), 20 deletions(-)
diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
index 751a49f6534f..746854745b15 100644
--- a/drivers/soc/qcom/qcom-geni-se.c
+++ b/drivers/soc/qcom/qcom-geni-se.c
@@ -266,49 +266,53 @@ EXPORT_SYMBOL(geni_se_init);
static void geni_se_select_fifo_mode(struct geni_se *se)
{
u32 proto = geni_se_read_proto(se);
- u32 val;
+ u32 val, val_old;
geni_se_irq_clear(se);
- val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
if (proto != GENI_SE_UART) {
+ val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
val |= M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN;
val |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN;
- }
- writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);
+ if (val != val_old)
+ writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);
- val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN);
- if (proto != GENI_SE_UART)
- val |= S_CMD_DONE_EN;
- writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN);
+ val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN);
+ if (!(val & S_CMD_DONE_EN))
+ writel_relaxed(val | S_CMD_DONE_EN,
+ se->base + SE_GENI_S_IRQ_EN);
+ }
val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN);
- val &= ~GENI_DMA_MODE_EN;
- writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN);
+ if (val & GENI_DMA_MODE_EN)
+ writel_relaxed(val & ~GENI_DMA_MODE_EN,
+ se->base + SE_GENI_DMA_MODE_EN);
}
static void geni_se_select_dma_mode(struct geni_se *se)
{
u32 proto = geni_se_read_proto(se);
- u32 val;
+ u32 val, val_old;
geni_se_irq_clear(se);
- val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
if (proto != GENI_SE_UART) {
+ val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN);
val &= ~(M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN);
- }
- writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);
+ if (val != val_old)
+ writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);
- val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN);
- if (proto != GENI_SE_UART)
- val &= ~S_CMD_DONE_EN;
- writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN);
+ val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN);
+ if (val & S_CMD_DONE_EN)
+ writel_relaxed(val & ~S_CMD_DONE_EN,
+ se->base + SE_GENI_S_IRQ_EN);
+ }
val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN);
- val |= GENI_DMA_MODE_EN;
- writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN);
+ if (!(val & GENI_DMA_MODE_EN))
+ writel_relaxed(val | GENI_DMA_MODE_EN,
+ se->base + SE_GENI_DMA_MODE_EN);
}
/**
--
2.28.0.1011.ga647a8990f-goog
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