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Message-ID: <83b53bc01a8ac72b4fd6e050bb97a2ef97090c5f.camel@infradead.org>
Date: Thu, 08 Oct 2020 14:00:49 +0100
From: David Woodhouse <dwmw2@...radead.org>
To: Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org
Cc: kvm <kvm@...r.kernel.org>, Paolo Bonzini <pbonzini@...hat.com>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/5] x86/apic: Support 15 bits of APIC ID in IOAPIC/MSI
where available
On Thu, 2020-10-08 at 13:54 +0200, Thomas Gleixner wrote:
> On Wed, Oct 07 2020 at 13:20, David Woodhouse wrote:
> >
> > + /*
> > + * If the hypervisor supports extended destination ID in IOAPIC
> > + * and MSI, that increases the maximum APIC ID that can be used
> > + * for non-remapped IRQ domains.
> > + */
> > + if (x86_init.hyper.msi_ext_dest_id()) {
> > + msi_ext_dest_id = 1;
> > + apic_limit = 32767;
> > + }
>
> This needs to be outside of the remap mode check because?
Once upon a time, there was a later patch in the series which *also*
used the apic_limit variable to generate a maximum affinity mask.
Now we've ditched that idea, I can put this back inside the remap mode
check.
>
> > +
> > if (remap_mode != IRQ_REMAP_X2APIC_MODE) {
> > /*
> > * Using X2APIC without IR is not architecturally supported
> > @@ -1856,9 +1868,10 @@ static __init void try_to_enable_x2apic(int remap_mode)
> > * in physical mode, and CPUs with an APIC ID that cannnot
> > * be addressed must not be brought online.
> > */
> > - x2apic_set_max_apicid(255);
> > + x2apic_set_max_apicid(apic_limit);
> > x2apic_phys = 1;
> > }
> > +
> > x2apic_enable();
> > }
> >
> > diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
> > index 2825e003259c..85206f971284 100644
> > --- a/arch/x86/kernel/apic/msi.c
> > +++ b/arch/x86/kernel/apic/msi.c
> > @@ -23,8 +23,11 @@
> >
> > struct irq_domain *x86_pci_msi_default_domain __ro_after_init;
> >
> > +int msi_ext_dest_id __ro_after_init;
>
> bool please.
>
> Aside of that this breaks the build for a kernel with CONFIG_PCI_MSI=n
Will fix (and rename).
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