[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20201008150819.GA3871@e121166-lin.cambridge.arm.com>
Date: Thu, 8 Oct 2020 16:08:19 +0100
From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To: Kishon Vijay Abraham I <kishon@...com>
Cc: Rob Herring <robh@...nel.org>,
Gustavo Pimentel <Gustavo.Pimentel@...opsys.com>,
"Z.q. Hou" <zhiqiang.hou@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
PCI <linux-pci@...r.kernel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Michael Walle <michael@...le.cc>,
Ard Biesheuvel <ardb@...nel.org>
Subject: Re: [PATCH] PCI: dwc: Added link up check in map_bus of
dw_child_pcie_ops
On Thu, Oct 01, 2020 at 07:02:04PM +0530, Kishon Vijay Abraham I wrote:
[...]
> >> Yeah, I don't see any registers in the DRA7x PCIe wrapper for disabling
> >> error forwarding.
> >
> > It's a DWC port logic register AFAICT, but perhaps not present in all versions.
>
> Okay. I see there's a register PCIECTRL_PL_AXIS_SLV_ERR_RESP which has a
> reset value of 0.
>
> It has four bit-fields, RESET_TIMEOUT_ERR_MAP, NO_VID_ERR_MAP,
> DBI_ERR_MAP and SLAVE_ERR_MAP. I'm not seeing any difference in behavior
> if I set all these bits. Maybe it requires platform support too. I'll
> check this with our design team.
>
> Meanwhile would it be okay to add linkup check atleast for DRA7X so that
> we could have it booting in linux-next?
Do you mind sending a patch on top of my pci/dwc please ?
Thanks,
Lorenzo
Powered by blists - more mailing lists