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Date:   Sun, 11 Oct 2020 17:57:25 -0000
From:   "tip-bot2 for Cristian Ciocaltea" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Cristian Ciocaltea <cristian.ciocaltea@...il.com>,
        Marc Zyngier <maz@...nel.org>, Rob Herring <robh@...nel.org>,
        x86 <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>
Subject: [tip: irq/core] dt-bindings: interrupt-controller: Add Actions SIRQ
 controller binding

The following commit has been merged into the irq/core branch of tip:

Commit-ID:     b2bd271c3961f35dd127c99c8f576d9fcc2cb0c4
Gitweb:        https://git.kernel.org/tip/b2bd271c3961f35dd127c99c8f576d9fcc2cb0c4
Author:        Cristian Ciocaltea <cristian.ciocaltea@...il.com>
AuthorDate:    Mon, 14 Sep 2020 23:27:17 +03:00
Committer:     Marc Zyngier <maz@...nel.org>
CommitterDate: Fri, 25 Sep 2020 16:57:33 +01:00

dt-bindings: interrupt-controller: Add Actions SIRQ controller binding

Actions Semi Owl SoCs SIRQ interrupt controller is found in S500, S700
and S900 SoCs and provides support for handling up to 3 external
interrupt lines.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...il.com>
Signed-off-by: Marc Zyngier <maz@...nel.org>
Reviewed-by: Rob Herring <robh@...nel.org>
Link: https://lore.kernel.org/r/c2046b747574ea56c1cf05c05b402c7f01d5e4fc.1600114378.git.cristian.ciocaltea@gmail.com
---
 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml | 65 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml
new file mode 100644
index 0000000..5da333c
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/actions,owl-sirq.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Actions Semi Owl SoCs SIRQ interrupt controller
+
+maintainers:
+  - Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
+  - Cristian Ciocaltea <cristian.ciocaltea@...il.com>
+
+description: |
+  This interrupt controller is found in the Actions Semi Owl SoCs (S500, S700
+  and S900) and provides support for handling up to 3 external interrupt lines.
+
+properties:
+  compatible:
+    enum:
+      - actions,s500-sirq
+      - actions,s700-sirq
+      - actions,s900-sirq
+
+  reg:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 2
+    description:
+      The first cell is the input IRQ number, between 0 and 2, while the second
+      cell is the trigger type as defined in interrupt.txt in this directory.
+
+  'interrupts':
+    description: |
+      Contains the GIC SPI IRQs mapped to the external interrupt lines.
+      They shall be specified sequentially from output 0 to 2.
+    minItems: 3
+    maxItems: 3
+
+required:
+  - compatible
+  - reg
+  - interrupt-controller
+  - '#interrupt-cells'
+  - 'interrupts'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    sirq: interrupt-controller@...b0200 {
+      compatible = "actions,s500-sirq";
+      reg = <0xb01b0200 0x4>;
+      interrupt-controller;
+      #interrupt-cells = <2>;
+      interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ0 */
+                   <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ1 */
+                   <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; /* SIRQ2 */
+    };
+
+...

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