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Message-Id: <20201012042200.29787-12-jee.heng.sia@intel.com>
Date: Mon, 12 Oct 2020 12:21:56 +0800
From: Sia Jee Heng <jee.heng.sia@...el.com>
To: vkoul@...nel.org, Eugeniy.Paltsev@...opsys.com
Cc: andriy.shevchenko@...ux.intel.com, dmaengine@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 11/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA
Add support for Intel KeemBay AxiDMA to the dw-axi-dmac
Schemas DT binding.
Signed-off-by: Sia Jee Heng <jee.heng.sia@...el.com>
---
.../bindings/dma/snps,dw-axi-dmac.yaml | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
index e688d25864bc..0e9bc5553a36 100644
--- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -8,6 +8,7 @@ title: Synopsys DesignWare AXI DMA Controller
maintainers:
- Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com
+ - Sia, Jee Heng <jee.heng.sia@...el.com>
description: |
Synopsys DesignWare AXI DMA Controller DT Binding
@@ -16,6 +17,7 @@ properties:
compatible:
enum:
- snps,axi-dma-1.01a
+ - intel,kmb-axi-dma
reg:
items:
@@ -24,6 +26,7 @@ properties:
reg-names:
items:
- const: axidma_ctrl_regs
+ - const: axidma_apb_regs
interrupts:
maxItems: 1
@@ -122,3 +125,25 @@ examples:
snps,priority = <0 1 2 3>;
snps,axi-max-burst-len = <16>;
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ /* example with intel,kmb-axi-dma */
+ #define KEEM_BAY_PSS_AXI_DMA
+ #define KEEM_BAY_PSS_APB_AXI_DMA
+ axi_dma: dma@...00000 {
+ compatible = "intel,kmb-axi-dma";
+ reg = <0x28000000 0x1000 0x20250000 0x24>;
+ reg-names = "axidma_ctrl_regs", "axidma_apb_regs";
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "core-clk", "cfgr-clk";
+ clocks = <&scmi_clk KEEM_BAY_PSS_AXI_DMA>, <&scmi_clk KEEM_BAY_PSS_APB_AXI_DMA>;
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ snps,dma-masters = <1>;
+ snps,data-width = <4>;
+ snps,priority = <0 0 0 0 0 0 0 0>;
+ snps,block-size = <1024 1024 1024 1024 1024 1024 1024 1024>;
+ snps,axi-max-burst-len = <16>;
+ };
--
2.18.0
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