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Message-Id: <20201012205957.889185-10-adrian.ratiu@collabora.com>
Date: Mon, 12 Oct 2020 23:59:48 +0300
From: Adrian Ratiu <adrian.ratiu@...labora.com>
To: Ezequiel Garcia <ezequiel@...labora.com>,
Philipp Zabel <p.zabel@...gutronix.de>
Cc: Mark Brown <broonie@...nel.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Fruehberger Peter <Peter.Fruehberger@...bosch.com>,
kuhanh.murugasen.krishnan@...el.com,
Daniel Vetter <daniel@...ll.ch>, kernel@...labora.com,
linux-media@...r.kernel.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 09/18] media: hantro: default regmap to relaxed MMIO
This is done to match the pre-regmap membarrier behaviour, ensuring
default regmap_write calls in _relaxed() are indeed relaxed while
the non-relaxed versions include an explicit mem-barrier call.
Signed-off-by: Adrian Ratiu <adrian.ratiu@...labora.com>
---
drivers/staging/media/hantro/hantro.h | 4 ++++
drivers/staging/media/hantro/hantro_regmap.c | 1 +
2 files changed, 5 insertions(+)
diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
index c5425cd5ac84..5b7fbdc3779d 100644
--- a/drivers/staging/media/hantro/hantro.h
+++ b/drivers/staging/media/hantro/hantro.h
@@ -346,6 +346,7 @@ static inline void vepu_write_relaxed(struct hantro_dev *vpu,
static inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
{
vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ wmb(); /* flush encoder previous relaxed writes */
regmap_write(vpu->regs_enc, reg, val);
}
@@ -354,6 +355,7 @@ static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
u32 val;
regmap_read(vpu->regs_enc, reg, &val);
+ rmb(); /* read encoder swreg data in order */
vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
return val;
@@ -369,6 +371,7 @@ static inline void vdpu_write_relaxed(struct hantro_dev *vpu,
static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
{
vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ wmb();/* flush decoder previous relaxed writes */
regmap_write(vpu->regs_dec, reg, val);
}
@@ -377,6 +380,7 @@ static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
u32 val;
regmap_read(vpu->regs_dec, reg, &val);
+ rmb(); /* read decoder swreg data in order */
vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
return val;
diff --git a/drivers/staging/media/hantro/hantro_regmap.c b/drivers/staging/media/hantro/hantro_regmap.c
index 890e443688e2..2fc409cbd797 100644
--- a/drivers/staging/media/hantro/hantro_regmap.c
+++ b/drivers/staging/media/hantro/hantro_regmap.c
@@ -21,6 +21,7 @@ struct regmap_config hantro_regmap_dec = {
.reg_stride = 4,
/* all hantro accesses are sequential, even with respect to irq ctx */
.disable_locking = true,
+ .use_relaxed_mmio = true,
.name = "hantro_regmap_dec",
};
--
2.28.0
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