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Date:   Tue, 13 Oct 2020 11:52:17 -0300
From:   Arnaldo Carvalho de Melo <acme@...nel.org>
To:     Leo Yan <leo.yan@...aro.org>
Cc:     Andre Przywara <andre.przywara@....com>,
        Will Deacon <will@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Tan Xiaojun <tanxiaojun@...wei.com>,
        James Clark <james.clark@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/5] perf: arm_spe: Decode memory tagging properties

Em Tue, Oct 13, 2020 at 11:51:03AM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Sun, Sep 27, 2020 at 11:19:18AM +0800, Leo Yan escreveu:
> > On Tue, Sep 22, 2020 at 11:12:24AM +0100, Andre Przywara wrote:
> > > When SPE records a physical address, it can additionally tag the event
> > > with information from the Memory Tagging architecture extension.
> > > 
> > > Decode the two additional fields in the SPE event payload.
> > > 
> > > Signed-off-by: Andre Przywara <andre.przywara@....com>
> > > ---
> > >  .../util/arm-spe-decoder/arm-spe-pkt-decoder.c  | 17 ++++++++++++-----
> > >  1 file changed, 12 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > > index 943e4155b246..a033f34846a6 100644
> > > --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > > +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > > @@ -8,13 +8,14 @@
> > >  #include <string.h>
> > >  #include <endian.h>
> > >  #include <byteswap.h>
> > > +#include <linux/bits.h>
> > >  
> > >  #include "arm-spe-pkt-decoder.h"
> > >  
> > > -#define BIT(n)		(1ULL << (n))
> > > -
> > >  #define NS_FLAG		BIT(63)
> > >  #define EL_FLAG		(BIT(62) | BIT(61))
> > > +#define CH_FLAG		BIT(62)
> > > +#define PAT_FLAG	GENMASK_ULL(59, 56)
> > >  
> > >  #define SPE_HEADER0_PAD			0x0
> > >  #define SPE_HEADER0_END			0x1
> > > @@ -447,10 +448,16 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
> > >  			return snprintf(buf, buf_len, "%s 0x%llx el%d ns=%d",
> > >  				        (idx == 1) ? "TGT" : "PC", payload, el, ns);
> > >  		case 2:	return snprintf(buf, buf_len, "VA 0x%llx", payload);
> > > -		case 3:	ns = !!(packet->payload & NS_FLAG);
> > > +		case 3:	{
> > > +			int ch = !!(packet->payload & CH_FLAG);
> > > +			int pat = (packet->payload & PAT_FLAG) >> 56;
> > > +
> > > +			ns = !!(packet->payload & NS_FLAG);
> > >  			payload &= ~(0xffULL << 56);
> > > -			return snprintf(buf, buf_len, "PA 0x%llx ns=%d",
> > > -					payload, ns);
> > > +			return snprintf(buf, buf_len,
> > > +					"PA 0x%llx ns=%d ch=%d, pat=%x",
> > > +					payload, ns, ch, pat);
> > > +			}
> > 
> > Reviewed-by: Leo Yan <leo.yan@...aro.org>
> 
> Thanks, applied.

I take that back, I'm applying Leo's series that Andre reviewed instead.

- Arnaldo

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