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Message-Id: <20201014094443.11070-2-jacopo+renesas@jmondi.org>
Date:   Wed, 14 Oct 2020 11:44:38 +0200
From:   Jacopo Mondi <jacopo+renesas@...ndi.org>
To:     linux-renesas-soc@...r.kernel.org, geert+renesas@...der.be,
        laurent.pinchart@...asonboard.com
Cc:     Jacopo Mondi <jacopo+renesas@...ndi.org>,
        linux-kernel@...r.kernel.org
Subject: [PATCH 1/6] clk: renesas: r8a779a0: Add CSI4[0-3] clocks

Add clock definitions of the CSI-2 receivers for R-Car V3U.

Signed-off-by: Jacopo Mondi <jacopo+renesas@...ndi.org>
---
 drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 7e25b3b8945b..bd54a28c50ee 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -141,6 +141,10 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = {
 };
 
 static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
+	DEF_MOD("csi40",	331,	R8A779A0_CLK_CSI0),
+	DEF_MOD("csi41",	400,	R8A779A0_CLK_CSI0),
+	DEF_MOD("csi42",	401,	R8A779A0_CLK_CSI0),
+	DEF_MOD("csi43",	402,	R8A779A0_CLK_CSI0),
 	DEF_MOD("scif0",	702,	R8A779A0_CLK_S1D8),
 	DEF_MOD("scif1",	703,	R8A779A0_CLK_S1D8),
 	DEF_MOD("scif3",	704,	R8A779A0_CLK_S1D8),
-- 
2.28.0

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