linux-kernel - [PATCH] KVM: x86: Filter out more Intel-specific PMU MSRs in kvm_init_msr

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Date:   Wed, 14 Oct 2020 14:50:20 +0200
From:   Vitaly Kuznetsov <vkuznets@...hat.com>
To:     kvm@...r.kernel.org, Paolo Bonzini <pbonzini@...hat.com>
Cc:     Sean Christopherson <sean.j.christopherson@...el.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>, linux-kernel@...r.kernel.org
Subject: [PATCH] KVM: x86: Filter out more Intel-specific PMU MSRs in kvm_init_msr_list()

When running KVM selftest in a Hyper-V VM they stumble upon

  Unexpected result from KVM_GET_MSRS, r: 14 (failed MSR was 0x309)

MSR_ARCH_PERFMON_FIXED_CTR[0..3] along with MSR_CORE_PERF_FIXED_CTR_CTRL,
MSR_CORE_PERF_GLOBAL_STATUS, MSR_CORE_PERF_GLOBAL_CTRL,
MSR_CORE_PERF_GLOBAL_OVF_CTRL are only valid for Intel PMU ver > 1 but
Hyper-V instances have CPUID.0AH.EAX == 0 (so perf code falls back to
p6_pmu instead of intel_pmu). Surprisingly, unlike on AMD hardware for
example, our rdmsr_safe() check passes and MSRs are not filtered out.

MSR_ARCH_PERFMON_FIXED_CTR[0..3] can probably be checked against
x86_pmu.num_counters_fixed and the rest is only present with
x86_pmu.version > 1.

Unfortunately, full elimination of the disconnection between system-wide
KVM_GET_MSR_INDEX_LIST/KVM_GET_MSR_FEATURE_INDEX_LIST and per-VCPU
KVM_GET_MSRS/KVM_SET_MSRS seem to be impossible as per-vCPU PMU setup
depends on guest CPUIDs which can always be altered.

Signed-off-by: Vitaly Kuznetsov <vkuznets@...hat.com>
---
 arch/x86/kvm/x86.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index ce856e0ece84..85d72b125fba 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -5436,6 +5436,15 @@ static void kvm_init_msr_list(void)
 			    min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
 				continue;
 			break;
+		case MSR_ARCH_PERFMON_FIXED_CTR0 ... MSR_ARCH_PERFMON_FIXED_CTR0 + 3:
+			if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_FIXED_CTR0 >=
+			    min(INTEL_PMC_MAX_FIXED, x86_pmu.num_counters_fixed))
+				continue;
+			break;
+		case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL:
+			if (x86_pmu.version <= 1)
+				continue;
+			break;
 		default:
 			break;
 		}
-- 
2.25.4