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Date:   Wed, 14 Oct 2020 15:54:13 +0100
From:   Richard Fitzgerald <rf@...nsource.cirrus.com>
To:     <broonie@...nel.org>, <robh+dt@...nel.org>,
        <nsaenzjulienne@...e.de>
CC:     <patches@...nsource.cirrus.com>, <alsa-devel@...a-project.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-rpi-kernel@...ts.infradead.org>,
        Richard Fitzgerald <rf@...nsource.cirrus.com>
Subject: [PATCH 2/7] ASoC: simple-card: Add plls and sysclks DT schema

This adds the two new properties 'plls' and 'sysclks' to the dt bindings
schema document. These add the ability to set values that will be
passed to snd_soc_component_set_sysclk() and snd_soc_component_set_pll().

Signed-off-by: Richard Fitzgerald <rf@...nsource.cirrus.com>
---
 .../bindings/sound/simple-card.yaml           | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/simple-card.yaml b/Documentation/devicetree/bindings/sound/simple-card.yaml
index 35e669020296..48c9a4313d58 100644
--- a/Documentation/devicetree/bindings/sound/simple-card.yaml
+++ b/Documentation/devicetree/bindings/sound/simple-card.yaml
@@ -92,6 +92,25 @@ definitions:
     description: the widget names for which pin switches must be created.
     $ref: /schemas/types.yaml#/definitions/string-array
 
+  plls:
+    description: |
+      A list of component pll settings that will be applied with
+      snd_soc_component_set_pll. Each entry is a phandle to the node of the
+      codec or cpu component, followed by the four arguments id, source,
+      frequency_in, frequency_out. Multiple entries can have the same phandle
+      so that several plls can be set in the same component.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
+  sysclks:
+    description: |
+      A list of component sysclk settings that will be applied with
+      snd_soc_component_set_sysclk. Each entry is a phandle to the node of
+      the codec or cpu component, followed by the four arguments id, source,
+      frequency, direction. Direction is 0 if the clock is an input, 1 if it
+      is an output. Multiple entries can have the same phandle so that several
+      clocks can be set in the same component.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
   format:
     description: audio format.
     items:
@@ -192,6 +211,10 @@ patternProperties:
     $ref: "#/definitions/prefix"
   "^simple-audio-card,pin-switches$":
     $ref: "#/definitions/pin-switches"
+  "^simple-audio-card,plls$":
+    $ref: "#/definitions/plls"
+  "^simple-audio-card,sysclks$":
+    $ref: "#/definitions/sysclks"
   "^simple-audio-card,hp-det-gpio$":
     maxItems: 1
   "^simple-audio-card,mic-det-gpio$":
@@ -489,3 +512,36 @@ examples:
             };
         };
     };
+
+#--------------------
+# Codec with component PLL and SYSCLK settings
+#--------------------
+  - |
+    sound {
+        compatible = "simple-audio-card";
+
+        simple-audio-card,plls = <
+            &cs47l15 1 1 32768 98304000
+        >;
+
+        simple-audio-card,sysclks = <
+            &cs47l15 1 4 98304000 0
+            &cs47l15 8 4 147456000 0
+        >;
+
+        simple-audio-card,format = "i2s";
+        simple-audio-card,bitclock-master = <&cs47l15_codec_dai>;
+        simple-audio-card,frame-master = <&cs47l15_codec_dai>;
+
+        simple-audio-card,cpu {
+            sound-dai = <&axi_i2s0 0>;
+        };
+
+        cs47l15_codec_dai: simple-audio-card,codec {
+            sound-dai = <&cs47l15 0>;
+
+            /* Disable dai_set_sysclk() */
+            system-clock-frequency = <0>;
+            mclk-fs = <0>;
+        };
+    };
-- 
2.20.1

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