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Message-ID: <CAOwMV_wpsh=c0r7U-FM6ffz_Sq3HD9PJKoDv+auyhV2ER8_pVA@mail.gmail.com>
Date: Wed, 14 Oct 2020 18:47:22 +0200
From: Fabien Parent <fparent@...libre.com>
To: Chun-Kuang Hu <chunkuang.hu@...nel.org>
Cc: linux-kernel <linux-kernel@...r.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
DRI Development <dri-devel@...ts.freedesktop.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
David Airlie <airlied@...ux.ie>,
Philipp Zabel <p.zabel@...gutronix.de>
Subject: Re: [PATCH v2 2/2] drm/mediatek: mtk_hdmi: add MT8167 support for HDMI
Hi Chun-Kuang,
On Wed, Oct 14, 2020 at 6:25 PM Fabien Parent <fparent@...libre.com> wrote:
>
> Hi Chun-Kuang,
>
> On Wed, Oct 14, 2020 at 3:00 PM Chun-Kuang Hu <chunkuang.hu@...nel.org> wrote:
> >
> > Hi, Fabien:
> >
> > Fabien Parent <fparent@...libre.com> 於 2020年10月14日 週三 上午2:19寫道:
> > >
> > > Add support for HDMI on MT8167. HDMI on MT8167 is similar to
> > > MT8173/MT2701 execpt for the two registers: SYS_CFG1C and SYS_CFG20
> >
> > I think you should drop this series. According to Mediatek HDMI
> > binding document [1], the second parameter of mediatek,syscon-hdmi is
> > the register offset. I think you could set register offset to 0x800
> > for mt8167.
> Ok, thank you. I will try it.
Thanks, it works. Dropping this series.
>
> >
> > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt?h=v5.9
> >
> > Regards,
> > Chun-Kuang.
> >
> > >
> > > Signed-off-by: Fabien Parent <fparent@...libre.com>
> > > ---
> > >
> > > Changelog:
> > > v2: fix name of pdata structure
> > >
> > > drivers/gpu/drm/mediatek/mtk_hdmi.c | 7 +++++++
> > > drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 2 ++
> > > 2 files changed, 9 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > > index 57370c036497..484ea9cd654a 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > > @@ -1835,9 +1835,16 @@ static struct mtk_hdmi_data mt8173_hdmi_driver_data = {
> > > .sys_cfg20 = HDMI_SYS_CFG20,
> > > };
> > >
> > > +static struct mtk_hdmi_data mt8167_hdmi_driver_data = {
> > > + .sys_cfg1c = MT8167_HDMI_SYS_CFG1C,
> > > + .sys_cfg20 = MT8167_HDMI_SYS_CFG20,
> > > +};
> > > +
> > > static const struct of_device_id mtk_drm_hdmi_of_ids[] = {
> > > { .compatible = "mediatek,mt8173-hdmi",
> > > .data = &mt8173_hdmi_driver_data },
> > > + { .compatible = "mediatek,mt8167-hdmi",
> > > + .data = &mt8167_hdmi_driver_data },
> > > {}
> > > };
> > >
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
> > > index 2050ba45b23a..a0f9c367d7aa 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
> > > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
> > > @@ -195,6 +195,7 @@
> > > #define GEN_RGB (0 << 7)
> > >
> > > #define HDMI_SYS_CFG1C 0x000
> > > +#define MT8167_HDMI_SYS_CFG1C 0x800
> > > #define HDMI_ON BIT(0)
> > > #define HDMI_RST BIT(1)
> > > #define ANLG_ON BIT(2)
> > > @@ -211,6 +212,7 @@
> > > #define HTPLG_PIN_SEL_OFF BIT(30)
> > > #define AES_EFUSE_ENABLE BIT(31)
> > > #define HDMI_SYS_CFG20 0x004
> > > +#define MT8167_HDMI_SYS_CFG20 0x804
> > > #define DEEP_COLOR_MODE_MASK (3 << 1)
> > > #define COLOR_8BIT_MODE (0 << 1)
> > > #define COLOR_10BIT_MODE (1 << 1)
> > > --
> > > 2.28.0
> > >
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