[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <41bbcd43c2b016b6d785c3750622e9fe@codeaurora.org>
Date: Fri, 16 Oct 2020 17:17:09 +0530
From: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
To: Suzuki Poulose <suzuki.poulose@....com>
Cc: Mathieu Poirier <mathieu.poirier@...aro.org>,
Mike Leach <mike.leach@...aro.org>, coresight@...ts.linaro.org,
Stephen Boyd <swboyd@...omium.org>, denik@...omium.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] coresight: etm4x: Skip setting LPOVERRIDE bit for
qcom,skip-power-up
Hi Suzuki,
On 2020-10-16 16:51, Suzuki Poulose wrote:
> Hi Sai,
>
> On 10/16/20 11:10 AM, Sai Prakash Ranjan wrote:
>> There is a bug on the systems supporting to skip power up
>> (qcom,skip-power-up) where setting LPOVERRIDE bit(low-power
>> state override behaviour) will result in CPU hangs/lockups
>> even on the implementations which supports it. So skip
>> setting the LPOVERRIDE bit for such platforms.
>>
>> Fixes: 02510a5aa78d ("coresight: etm4x: Add support to skip trace unit
>> power up")
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
>
> The fix is fine by me. Btw, is there a hardware Erratum assigned for
> this ? It would be good to have the Erratum documented somewhere,
> preferrably ( Documentation/arm64/silicon-errata.rst )
>
No, afaik we don't have any erratum assigned to this bug.
It was already present in downstream kernel and since we
support these targets with the previous HW bug
(qcom,skip-power-up) now in upstream, we would need this
fix in upstream kernel as well.
Thanks,
Sai
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
member
of Code Aurora Forum, hosted by The Linux Foundation
Powered by blists - more mailing lists