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Message-ID: <2c5d1e04-3b4c-311e-38fb-357e2fcd44a8@linux.intel.com>
Date: Mon, 19 Oct 2020 14:26:36 +0800
From: "Ramuthevar, Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@...ux.intel.com>
To: Mark Brown <broonie@...nel.org>
Cc: vigneshr@...com, tudor.ambarus@...rochip.com,
linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
robh+dt@...nel.org, devicetree@...r.kernel.org,
miquel.raynal@...tlin.com, simon.k.r.goldschmidt@...il.com,
dinguyen@...nel.org, richard@....at, cheol.yong.kim@...el.com,
qi-ming.wu@...el.com
Subject: Re: [PATCH v1 4/6] spi: cadence-quadspi: Add QSPI support for Intel
LGM SoC
Hi Mark,
On 17/10/2020 12:33 am, Mark Brown wrote:
> On Fri, Oct 16, 2020 at 05:31:36PM +0800, Ramuthevar,Vadivel MuruganX wrote:
>
>> + depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST)
>
>> + {
>> + .compatible = "intel,lgm-qspi",
>> + },
>
> This is an x86 SoC (or SoC series) - is it really going to use DT for
> the firmware interfaces?
Thank you for the review comments...
Intel LGM SoC does uses DT based firmware blob.
It's not specifically a problem, just
> surprising to see something other than ACPI. Or is the intention to use
> PRP0001?
Yes, You're right most of them uses ACPI based, but LGM SoC doesn't.
Regards
Vadivel
There's a new comaptible here which wasn't really the use case
> for PRP0001. Like I say not really a problem, just curious.
>
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