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Message-ID: <CACRpkdZMC--Ejvbd0CU7+jTrtddGmu_01=SsuuQTGasZLi9wxg@mail.gmail.com>
Date: Mon, 19 Oct 2020 15:48:27 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Paul Cercueil <paul@...pouillou.net>
Cc: Zhou Yanjie <zhouyanjie@...yeetech.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Artur Rojek <contact@...ur-rojek.eu>
Subject: Re: [PATCH] pinctrl: ingenic: Fix invalid SSI pins
On Sat, Oct 10, 2020 at 9:25 PM Paul Cercueil <paul@...pouillou.net> wrote:
> The values for the SSI pins on GPIO chips D and E were off by 0x20.
>
> Fixes: d3ef8c6b2286 ("pinctrl: Ingenic: Add SSI pins support for JZ4770 and JZ4780.")
> Signed-off-by: Paul Cercueil <paul@...pouillou.net>
> Reported-by: Artur Rojek <contact@...ur-rojek.eu>
Patch applied for fixes. Thanks!
Yours,
Linus Walleij
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