linux-kernel - RE: [PATCH v2 0/5] Remove LPC register partitioning

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Date:   Tue, 20 Oct 2020 06:03:32 +0000
From:   ChiaWei Wang <chiawei_wang@...eedtech.com>
To:     "lee.jones@...aro.org" <lee.jones@...aro.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "joel@....id.au" <joel@....id.au>,
        "andrew@...id.au" <andrew@...id.au>,
        "minyard@....org" <minyard@....org>,
        "arnd@...db.de" <arnd@...db.de>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "linus.walleij@...aro.org" <linus.walleij@...aro.org>,
        "haiyue.wang@...ux.intel.com" <haiyue.wang@...ux.intel.com>,
        "cyrilbur@...il.com" <cyrilbur@...il.com>,
        "rlippert@...gle.com" <rlippert@...gle.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "openbmc@...ts.ozlabs.org" <openbmc@...ts.ozlabs.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
CC:     BMC-SW <BMC-SW@...eedtech.com>
Subject: RE: [PATCH v2 0/5] Remove LPC register partitioning

Hi All,

Do you have any comment on the v2 changes?
Thanks.

Chiawei

> -----Original Message-----
> From: ChiaWei Wang <chiawei_wang@...eedtech.com>
> Sent: Monday, October 5, 2020 4:28 PM
> To: lee.jones@...aro.org; robh+dt@...nel.org; joel@....id.au;
> andrew@...id.au; minyard@....org; arnd@...db.de;
> gregkh@...uxfoundation.org; linus.walleij@...aro.org;
> haiyue.wang@...ux.intel.com; cyrilbur@...il.com; rlippert@...gle.com;
> linux-arm-kernel@...ts.infradead.org; linux-aspeed@...ts.ozlabs.org;
> linux-kernel@...r.kernel.org; openbmc@...ts.ozlabs.org;
> linux-gpio@...r.kernel.org
> Subject: [PATCH v2 0/5] Remove LPC register partitioning
> 
> The LPC controller has no concept of the BMC and the Host partitions.
> The incorrect partitioning can impose unnecessary range restrictions on
> register access through the syscon regmap interface.
> 
> For instance, HICRB contains the I/O port address configuration of KCS channel
> 1/2. However, the KCS#1/#2 drivers cannot access HICRB as it is located at the
> other LPC partition.
> 
> In addition, to be backward compatible, the newly added HW control bits could
> be located at any reserved bits over the LPC addressing space.
> 
> Thereby, this patch series aims to remove the LPC partitioning for better driver
> development and maintenance.
> 
> 
> Changes since v1:
> 	- Add the fix to the aspeed-lpc binding documentation.
> 
> Chia-Wei, Wang (5):
>   ARM: dts: Remove LPC BMC and Host partitions
>   soc: aspeed: Fix LPC register offsets
>   ipmi: kcs: aspeed: Fix LPC register offsets
>   pinctrl: aspeed-g5: Fix LPC register offsets
>   dt-bindings: aspeed-lpc: Remove LPC partitioning
> 
>  .../devicetree/bindings/mfd/aspeed-lpc.txt    |  85 ++---------
>  arch/arm/boot/dts/aspeed-g4.dtsi              |  74 ++++------
>  arch/arm/boot/dts/aspeed-g5.dtsi              | 135 ++++++++----------
>  arch/arm/boot/dts/aspeed-g6.dtsi              | 135 ++++++++----------
>  drivers/char/ipmi/kcs_bmc_aspeed.c            |  13 +-
>  drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c    |   2 +-
>  drivers/soc/aspeed/aspeed-lpc-ctrl.c          |   6 +-
>  drivers/soc/aspeed/aspeed-lpc-snoop.c         |  11 +-
>  8 files changed, 176 insertions(+), 285 deletions(-)
> 
> --
> 2.17.1