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Message-ID: <20201020094839.GA21935@e121166-lin.cambridge.arm.com>
Date:   Tue, 20 Oct 2020 10:48:39 +0100
From:   Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To:     Rob Herring <robh@...nel.org>
Cc:     "Z.q. Hou" <zhiqiang.hou@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        PCI <linux-pci@...r.kernel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Michael Walle <michael@...le.cc>,
        Ard Biesheuvel <ardb@...nel.org>
Subject: Re: [PATCH] PCI: dwc: Added link up check in map_bus of
 dw_child_pcie_ops

On Fri, Sep 18, 2020 at 09:27:40AM -0600, Rob Herring wrote:

[...]

> > > Maybe a link down just never happens once up, but if so, then we only need
> > > to check it once and fail probe.
> >
> > Many customers connect the FPGA Endpoint, which may establish PCIe link
> > after the PCIe enumeration and then rescan the PCIe bus, so I think it should
> > not exit the probe of root port even if there is not link up during enumeration.
> 
> That's a good reason. I want to unify the behavior here as it varies
> per platform currently and wasn't sure which way to go.

We don't need to fail probe - just skip enumeration. Is there an IRQ
event associated with link coming up ? Scanning the bus can be done
upon link-up IRQ.

For platforms that forward the link down as an SError this still does
not solve the problem (if the link goes down unexpectedly) but I
question their design in the first place, this patch does not fix their
behaviour regardless.

Lorenzo

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