[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20201020174253.3757771-6-fparent@baylibre.com>
Date: Tue, 20 Oct 2020 19:42:50 +0200
From: Fabien Parent <fparent@...libre.com>
To: linux-mediatek@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, dri-devel@...ts.freedesktop.org
Cc: matthias.bgg@...il.com, robh+dt@...nel.org, daniel@...ll.ch,
airlied@...ux.ie, p.zabel@...gutronix.de, chunkuang.hu@...nel.org,
Fabien Parent <fparent@...libre.com>
Subject: [PATCH 5/8] drm/mediatek: dsi: add support for mipi26m clk
MT8167 SoC needs an additional clock to be enabled. Add support for
the mipi26m clk.
Signed-off-by: Fabien Parent <fparent@...libre.com>
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 461643c05689..08786734df8e 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -193,6 +193,7 @@ struct mtk_dsi {
struct clk *engine_clk;
struct clk *digital_clk;
struct clk *hs_clk;
+ struct clk *mipi26m;
u32 data_rate;
@@ -653,6 +654,12 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
goto err_disable_engine_clk;
}
+ ret = clk_prepare_enable(dsi->mipi26m);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enable mipi26m clock: %d\n", ret);
+ goto err_phy_power_off;
+ }
+
mtk_dsi_enable(dsi);
if (dsi->driver_data->has_shadow_ctl)
@@ -710,6 +717,7 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi)
clk_disable_unprepare(dsi->engine_clk);
clk_disable_unprepare(dsi->digital_clk);
+ clk_disable_unprepare(dsi->mipi26m);
phy_power_off(dsi->phy);
}
@@ -1086,6 +1094,8 @@ static int mtk_dsi_probe(struct platform_device *pdev)
goto err_unregister_host;
}
+ dsi->mipi26m = devm_clk_get_optional(dev, "mipi26m");
+
dsi->hs_clk = devm_clk_get(dev, "hs");
if (IS_ERR(dsi->hs_clk)) {
ret = PTR_ERR(dsi->hs_clk);
--
2.28.0
Powered by blists - more mailing lists