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Message-ID: <20201021125740.GM1551@shell.armlinux.org.uk>
Date: Wed, 21 Oct 2020 13:57:40 +0100
From: Russell King - ARM Linux admin <linux@...linux.org.uk>
To: Arnd Bergmann <arnd@...nel.org>
Cc: v.narang@...sung.com, a.sahrawat@...sung.com,
Andrew Morton <akpm@...ux-foundation.org>,
Marc Zyngier <maz@...nel.org>,
Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
Vincent Whitchurch <vincent.whitchurch@...s.com>,
Nick Desaulniers <ndesaulniers@...gle.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Valentin Schneider <valentin.schneider@....com>,
Dmitry Safonov <0x7f454c46@...il.com>,
Maninder Singh <maninder1.s@...sung.com>,
Thomas Gleixner <tglx@...utronix.de>,
Nathan Huckleberry <nhuck@...gle.com>,
Will Deacon <will@...nel.org>, Jian Cai <caij2003@...il.com>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 2/3] arm: introduce IRQ stacks
On Wed, Oct 21, 2020 at 01:45:42PM +0100, Russell King - ARM Linux admin wrote:
> On Wed, Oct 21, 2020 at 02:42:48PM +0200, Arnd Bergmann wrote:
> > (also resending this reply from @kernel.org)
> >
> > On Fri, Oct 16, 2020 at 12:19 PM Arnd Bergmann <arnd@...db.de> wrote:
> > > On Thu, Oct 8, 2020 at 9:20 AM Maninder Singh <maninder1.s@...sung.com> wrote:
> > > >
> > > > This patch adds code for switching to IRQ stack.
> > > > IRQ stack and Kernel SVC stack have below design.
> > > >
> > > > IRQ STACK:-
> > > > ------------ IRQ stack top
> > > > | |
> > > > ------------
> > > > . .
> > > > . .
> > > > . .
> > > > ------------
> > > > | sp | <- irq_stack_base + 0x8
> > > > ------------
> > > > | fp | <- irq_stack_base + 0x4
> > > > ------------
> > > > |tinfo_ptr | /* pointer to thread info */
> > > > irq_stack_ptr --> ------------ IRQ stack base
> > > >
> > > > Kernel SVC stack:-
> > > > ------------ Kernel stack top
> > > > | |
> > > > ------------
> > > > . .
> > > > . .
> > > > . .
> > > > ------------
> > > > | |
> > > > | |
> > > > ------------
> > > > |tinfo_ptr | /* pointer to thread info */
> > > > ------------ Kernel stack base
> > >
> > > The extra indirection doesn't look great, and I don't see any of the
> > > other architectures need that. Since we can access percpu data
> > > without going through thread_info, maybe doing the same as
> > > x86 would work here:
> > >
> > > - define 'current' as 'this_cpu_read_stable(current_task);'
> > > - convert to CONFIG_THREAD_INFO_IN_TASK
>
> That means we need to also code that up in assembly - remember, we
> need to access thread_info from assembly code.
Note also that there is a circular dependency involved. If you make
thread_info accessible via per-cpu, then:
#ifndef __my_cpu_offset
#define __my_cpu_offset per_cpu_offset(raw_smp_processor_id())
#endif
#ifdef CONFIG_DEBUG_PREEMPT
#define my_cpu_offset per_cpu_offset(smp_processor_id())
#else
#define my_cpu_offset __my_cpu_offset
#endif
smp_processor_id() ultimately ends up as raw_smp_processor_id() which
is:
#define raw_smp_processor_id() (current_thread_info()->cpu)
and if current_thread_info() itself involves reading from per-cpu data,
we end up recursing... infinitely.
This is why I said in the other thread:
"We don't do it because we don't have a separate register to be able
to store the thread_info pointer, and copying that lump between the
SVC and IRQ stack will add massively to IRQ latency, especially for
older machines."
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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