linux-kernel - Re: [PATCH v2 2/6] spi: cadence-quadspi: Disable the DAC for Intel LGM SoC

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Message-ID: <20201021140015.3ldwk4az5nlzhnvr@ti.com>
Date:   Wed, 21 Oct 2020 20:47:36 +0530
From:   Pratyush Yadav <p.yadav@...com>
To:     "Ramuthevar,Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
CC:     <vigneshr@...com>, <tudor.ambarus@...rochip.com>,
        <broonie@...nel.org>, <linux-kernel@...r.kernel.org>,
        <linux-spi@...r.kernel.org>, <robh+dt@...nel.org>,
        <devicetree@...r.kernel.org>, <miquel.raynal@...tlin.com>,
        <simon.k.r.goldschmidt@...il.com>, <dinguyen@...nel.org>,
        <richard@....at>, <cheol.yong.kim@...el.com>,
        <qi-ming.wu@...el.com>
Subject: Re: [PATCH v2 2/6] spi: cadence-quadspi: Disable the DAC for Intel
 LGM SoC

Hi,

On 21/10/20 10:55AM, Ramuthevar,Vadivel MuruganX wrote:
> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
> 
> On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
> Direct Access Controller(DAC).
> 
> This patch adds a quirk to disable the Direct Access Controller
> for data transfer instead it uses indirect data transfer.
> 
> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
> ---
>  drivers/spi/spi-cadence-quadspi.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index d7b10c46fa70..3d017b484114 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -1106,6 +1106,13 @@ static void cqspi_controller_init(struct cqspi_st *cqspi)
>  	reg |= CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL;
>  	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
>  
> +	/* Disable direct access controller */
> +	if (!cqspi->use_direct_mode) {
> +		reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
> +		reg &= ~CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL;
> +		writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
> +	}
> +

Do you really need to disable the DAC controller? cqspi_read() and 
cqspi_write() already check for cqspi->use_direct_mode and avoid using 
direct mode if it is false. While I don't think it would do any harm I'm 
curious what prompted you to do this instead of just setting the quirk 
like cdns_qspi does.

Anyway, if you do insist on doing it, it does not make any sense to set 
a bit and then unset it immediately after. The datasheet I have says 
this bit resets to 1 so the block above the code you added should be 
removed.

>  	cqspi_controller_enable(cqspi, 1);
>  }
>  
> @@ -1388,6 +1395,10 @@ static const struct cqspi_driver_platdata am654_ospi = {
>  	.quirks = CQSPI_NEEDS_WR_DELAY,
>  };
>  
> +static const struct cqspi_driver_platdata intel_lgm_qspi = {
> +	.quirks = CQSPI_DISABLE_DAC_MODE,
> +};
> +
>  static const struct of_device_id cqspi_dt_ids[] = {
>  	{
>  		.compatible = "cdns,qspi-nor",
> @@ -1403,6 +1414,7 @@ static const struct of_device_id cqspi_dt_ids[] = {
>  	},
>  	{
>  		.compatible = "intel,lgm-qspi",
> +		.data = &intel_lgm_qspi,
>  	},
>  	{ /* end of table */ }
>  };

-- 
Regards,
Pratyush Yadav
Texas Instruments India