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Message-Id: <20201021023615.48982-7-vadivel.muruganx.ramuthevar@linux.intel.com>
Date: Wed, 21 Oct 2020 10:36:15 +0800
From: "Ramuthevar,Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@...ux.intel.com>
To: vigneshr@...com, tudor.ambarus@...rochip.com, broonie@...nel.org,
linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
robh+dt@...nel.org
Cc: devicetree@...r.kernel.org, miquel.raynal@...tlin.com,
simon.k.r.goldschmidt@...il.com, dinguyen@...nel.org,
richard@....at, cheol.yong.kim@...el.com, qi-ming.wu@...el.com,
Ramuthevar Vadivel Murugan
<vadivel.muruganx.ramuthevar@...ux.intel.com>
Subject: [PATCH v2 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
Add compatible string for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
---
Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
index 57be1a730e7b..44378d2d2b9e 100644
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
@@ -19,6 +19,7 @@ properties:
- const: cdns,qspi-nor
- const: ti,k2g-qspi, cdns,qspi-nor
- const: ti,am654-ospi, cdns,qspi-nor
+ - const: intel,lgm-qspi, cdns,qspi-nor
reg:
items:
--
2.11.0
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