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Message-ID: <CAAOTY_9m-nqCe1HanPv5xa3mVLpyG6mC1pF1FRAFJdU1jqza_A@mail.gmail.com>
Date: Thu, 22 Oct 2020 01:01:46 +0800
From: Chun-Kuang Hu <chunkuang.hu@...nel.org>
To: Fabien Parent <fparent@...libre.com>
Cc: "moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
DTML <devicetree@...r.kernel.org>,
DRI Development <dri-devel@...ts.freedesktop.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Daniel Vetter <daniel@...ll.ch>,
David Airlie <airlied@...ux.ie>,
Philipp Zabel <p.zabel@...gutronix.de>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>
Subject: Re: [PATCH 2/8] dt-bindings: display: mediatek: dsi: add
documentation for MT8167 SoC
Hi, Fabien:
Fabien Parent <fparent@...libre.com> 於 2020年10月21日 週三 上午1:43寫道:
>
> Add binding documentation for the MT8167 SoC. The SoC needs
> an additional clock compared to the already supported SoC: mipi26m.
>
> Signed-off-by: Fabien Parent <fparent@...libre.com>
> ---
> .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> index f06f24d405a5..10ae6be7225e 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> @@ -7,12 +7,13 @@ channel output.
>
> Required properties:
> - compatible: "mediatek,<chip>-dsi"
> -- the supported chips are mt2701, mt7623, mt8173 and mt8183.
> +- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
> - reg: Physical base address and length of the controller's registers
> - interrupts: The interrupt signal from the function block.
> - clocks: device clocks
> See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> -- clock-names: must contain "engine", "digital", and "hs"
> +- clock-names: must contain "engine", "digital", "hs"
> + Can optionnally also contain "mipi26m"
It seems that mipi26m is the clock of mipi-tx. In mt8173.dtsi [1],
mipi-tx's clock is 26m.
mipi_tx0: mipi-dphy@...15000 {
compatible = "mediatek,mt8173-mipi-tx";
reg = <0 0x10215000 0 0x1000>;
clocks = <&clk26m>;
clock-output-names = "mipi_tx0_pll";
#clock-cells = <0>;
#phy-cells = <0>;
status = "disabled";
};
If this is the clock of mipi-tx, it should be controlled by mipi-tx driver.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8173.dtsi?h=v5.9
Regards,
Chun-Kuang.
> - phys: phandle link to the MIPI D-PHY controller.
> - phy-names: must contain "dphy"
> - port: Output port node with endpoint definitions as described in
> @@ -26,7 +27,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.
>
> Required properties:
> - compatible: "mediatek,<chip>-mipi-tx"
> -- the supported chips are mt2701, 7623, mt8173 and mt8183.
> +- the supported chips are mt2701, 7623, mt8167, mt8173 and mt8183.
> - reg: Physical base address and length of the controller's registers
> - clocks: PLL reference clock
> - clock-output-names: name of the output clock line to the DSI encoder
> --
> 2.28.0
>
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