linux-kernel - Re: [PATCH v2 14/14] perf arm-spe: Add support for ARMv8.3-SPE

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Message-ID: <20201022004413.GC3194@leoy-ThinkPad-X240s>
Date:   Thu, 22 Oct 2020 08:44:13 +0800
From:   Leo Yan <leo.yan@...aro.org>
To:     André Przywara <andre.przywara@....com>
Cc:     Arnaldo Carvalho de Melo <acme@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Wei Li <liwei391@...wei.com>,
        James Clark <james.clark@....com>,
        Dave Martin <Dave.Martin@....com>,
        linux-kernel@...r.kernel.org, Al Grant <Al.Grant@....com>
Subject: Re: [PATCH v2 14/14] perf arm-spe: Add support for ARMv8.3-SPE

Hi Andre,

On Wed, Oct 21, 2020 at 03:53:31PM +0100, André Przywara wrote:

[...]

> >>>>> diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> >>>>> index 05a4c74399d7..3ec381fddfcb 100644
> >>>>> --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> >>>>> +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> >>>>> @@ -342,14 +342,73 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
> >>>>>  					return ret;
> >>>>>  			}
> >>>>>  		}
> >>>>> +		if (idx > 2) {
> >>>>
> >>>> As I mentioned in the other patch, I doubt this extra comparison is
> >>>> useful. Does that protect us from anything?
> >>>
> >>> It's the same reason with Event packet which have explained for replying
> >>> patch 10, the condition is to respect the SPE specifiction:
> >>>
> >>>   E[11], byte 1, bit [11], when SZ == 0b10 , or SZ == 0b11
> >>>      Alignment.
> >>>      ...
> >>>      Otherwise this bit reads-as-zero.
> >>>
> >>> So we gives higher priority for checking payload size than the Event
> >>> bit setting; if you have other thinking for this, please let me know.
> >>
> >> Ah, thanks for pointing this out. It looks like a bug in the manual
> >> then, because I don't see why bit 11 should be any different from bits
> >> [10:8] and bits [15:12] in this respect. And in the diagrams above you
> >> clearly see bit 11 being shown even when SZ == 0b01.
> >>
> >> I will try to follow this up here.
> > 
> > Thanks for following up!
> 
> Just got the confirmation that this is indeed a bug in the manual. It
> will be fixed, but since the ARM ARM isn't published on a daily base, it
> might take a while to trickle in.

Thanks for confirmation and sharing the info!

Leo