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Message-Id: <20201022145816.14069-16-leo.yan@linaro.org>
Date: Thu, 22 Oct 2020 15:58:11 +0100
From: Leo Yan <leo.yan@...aro.org>
To: Arnaldo Carvalho de Melo <acme@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
Wei Li <liwei391@...wei.com>,
James Clark <james.clark@....com>,
Andre Przywara <andre.przywara@....com>,
Al Grant <Al.Grant@....com>, Dave Martin <Dave.Martin@....com>,
linux-kernel@...r.kernel.org
Cc: Leo Yan <leo.yan@...aro.org>
Subject: [PATCH v3 15/20] perf arm-spe: Remove size condition checking for events
In the Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.6 Events packet", it
describes the event bit is valid with specific payload requirement. For
example, the Last Level cache access event, the bit is defined as:
E[8], byte 1 bit [0], when SZ == 0b01 , when SZ == 0b10 ,
or when SZ == 0b11
It requires the payload size is at least 2 bytes, when byte 1 (start
counting from 0) is valid, E[8] (bit 0 in byte 1) can be used for LLC
access event type. For safety, the code checks the condition for
payload size firstly, if meet the requirement for payload size, then
continue to parse event type.
If review function arm_spe_get_payload(), it has used cast, so any bytes
beyond the valid size have been set to zeros.
For this reason, we don't need to check payload size anymore afterwards
when parse events, thus this patch removes payload size conditions.
Suggested-by: Andre Przywara <andre.przywara@....com>
Signed-off-by: Leo Yan <leo.yan@...aro.org>
---
.../util/arm-spe-decoder/arm-spe-decoder.c | 9 ++----
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 30 +++++++++----------
2 files changed, 17 insertions(+), 22 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index 776b3e6628bb..a5d7509d5daa 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -178,16 +178,13 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)
if (payload & BIT(EV_TLB_ACCESS))
decoder->record.type |= ARM_SPE_TLB_ACCESS;
- if ((idx == 2 || idx == 4 || idx == 8) &&
- (payload & BIT(EV_LLC_MISS)))
+ if (payload & BIT(EV_LLC_MISS))
decoder->record.type |= ARM_SPE_LLC_MISS;
- if ((idx == 2 || idx == 4 || idx == 8) &&
- (payload & BIT(EV_LLC_ACCESS)))
+ if (payload & BIT(EV_LLC_ACCESS))
decoder->record.type |= ARM_SPE_LLC_ACCESS;
- if ((idx == 2 || idx == 4 || idx == 8) &&
- (payload & BIT(EV_REMOTE_ACCESS)))
+ if (payload & BIT(EV_REMOTE_ACCESS))
decoder->record.type |= ARM_SPE_REMOTE_ACCESS;
if (payload & BIT(EV_MISPRED))
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 58a1390b7a43..2cb019999016 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -317,22 +317,20 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet,
if (ret < 0)
return ret;
}
- if (packet->index > 1) {
- if (payload & BIT(EV_LLC_ACCESS)) {
- ret = arm_spe_pkt_snprintf(&buf, &blen, " LLC-ACCESS");
- if (ret < 0)
- return ret;
- }
- if (payload & BIT(EV_LLC_MISS)) {
- ret = arm_spe_pkt_snprintf(&buf, &blen, " LLC-REFILL");
- if (ret < 0)
- return ret;
- }
- if (payload & BIT(EV_REMOTE_ACCESS)) {
- ret = arm_spe_pkt_snprintf(&buf, &blen, " REMOTE-ACCESS");
- if (ret < 0)
- return ret;
- }
+ if (payload & BIT(EV_LLC_ACCESS)) {
+ ret = arm_spe_pkt_snprintf(&buf, &blen, " LLC-ACCESS");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & BIT(EV_LLC_MISS)) {
+ ret = arm_spe_pkt_snprintf(&buf, &blen, " LLC-REFILL");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & BIT(EV_REMOTE_ACCESS)) {
+ ret = arm_spe_pkt_snprintf(&buf, &blen, " REMOTE-ACCESS");
+ if (ret < 0)
+ return ret;
}
return buf_len - blen;
--
2.17.1
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