linux-kernel - Re: [PATCH 3/3] mmc: rtsx: Add SD Express mode support for RTS5261

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Date:   Fri, 23 Oct 2020 14:12:19 +0200
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Christoph Hellwig <hch@....de>
Cc:     冯锐 <rui_feng@...lsil.com.cn>,
        Arnd Bergmann <arnd@...db.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>
Subject: Re: [PATCH 3/3] mmc: rtsx: Add SD Express mode support for RTS5261

On Fri, 23 Oct 2020 at 11:14, Christoph Hellwig <hch@....de> wrote:
>
> On Fri, Oct 23, 2020 at 10:02:15AM +0200, Ulf Hansson wrote:
> > > > Is there no mechanism to support read-only PCIe/NVMe based storage devices?
> > > > If that is the case, maybe it's simply better to not support the readonly option
> > > > at all for SD express cards?
> > > >
> > > I think there's no mechanism to support read-only PCIe/NVMe based storage devices.
> >
> > I have looped in Christoph, maybe he can give us his opinion on this.
>
> NVMe namespaces can have a bunch of 'write protection' modes advertised
> by the controller, which Linux respects.  The controller in this case would
> be part of the SD-Card.  IMHO it is a quality of implementation issue
> of the SD-Card/Controller to have the the write protection mode of the
> namespace(s) match that of the SD interface, and the SD card spec should
> talk about that if it doesn't already.

Christoph, thanks for your reply.

SD spec mentions the write-protect switch on SD cards, while uSD cards
doesn't have one. In general, host drivers implement support for it
via a dedicated GPIO line routed to one of the pins in the SD slot.

In this SD controller case, which is based upon PCI, it works a bit
differently, as the state of the write protect pin is managed through
the PCI interface.

If I understand you correctly, you are saying that the controller
should be able to communicate (upwards to the block layer) its known
write protect state for the corresponding NVMe device, during
initialization?

My apologies if the questions sounds silly, but I have limited
knowledge about the NVMe protocol, sorry.

Kind regards
Uffe