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Message-ID: <e0c40a70894359c6782b01e48730e6ecae9e5692.camel@infradead.org>
Date: Sat, 24 Oct 2020 09:41:02 +0100
From: David Woodhouse <dwmw2@...radead.org>
To: Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org
Cc: kvm <kvm@...r.kernel.org>, Paolo Bonzini <pbonzini@...hat.com>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-hyperv@...r.kernel.org, Dexuan Cui <decui@...rosoft.com>
Subject: Re: [PATCH v2 8/8] x86/ioapic: Generate RTE directly from parent
irqchip's MSI message
On Sat, 2020-10-24 at 09:26 +0100, David Woodhouse wrote:
>
> And now I wish it was just a simple shift instead of an unholy maze of
> overlapping unions of bitfields. But I'll make more coffee and stare at
> it harder...
Hah, it really *was* unions of the bitfields. This boots...
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index c65e89bedc93..3e14adba34ba 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -65,6 +65,8 @@ union IO_APIC_reg_03 {
};
struct IO_APIC_route_entry {
+ union {
+ struct {
u64 vector : 8,
delivery_mode : 3,
dest_mode_logical : 1,
@@ -77,7 +79,8 @@ struct IO_APIC_route_entry {
reserved_1 : 17,
virt_destid_8_14 : 7,
destid_0_7 : 8;
-
+ };
+ struct {
u64 ir_shared_0 : 8,
ir_zero : 3,
ir_index_15 : 1,
@@ -85,6 +88,8 @@ struct IO_APIC_route_entry {
ir_reserved_0 : 31,
ir_format : 1,
ir_index_0_14 : 15;
+ };
+ };
} __attribute__ ((packed));
struct irq_alloc_info;
diff --git a/arch/x86/include/asm/msi.h b/arch/x86/include/asm/msi.h
index 8cf82d134b78..ef9dfaa4603f 100644
--- a/arch/x86/include/asm/msi.h
+++ b/arch/x86/include/asm/msi.h
@@ -25,6 +25,7 @@ typedef struct x86_msi_data {
typedef struct x86_msi_addr_lo {
union {
+ struct {
u32 reserved_0 : 2,
dest_mode_logical : 1,
redirect_hint : 1,
@@ -32,13 +33,15 @@ typedef struct x86_msi_addr_lo {
virt_destid_8_14 : 7,
destid_0_7 : 8,
base_address : 12;
-
+ };
+ struct {
u32 dmar_reserved_0 : 2,
dmar_index_15 : 1,
dmar_subhandle_valid : 1,
dmar_format : 1,
dmar_index_0_14 : 15,
dmar_base_address : 12;
+ };
};
} __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
#define arch_msi_msg_addr_lo x86_msi_addr_lo
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